| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Tue, 18 May 2021 09:58:31 +0200
From: Neil Armstrong <narmstrong@...libre.com>
To: gregkh@...uxfoundation.org, jirislaby@...nel.org,
devicetree@...r.kernel.org
Cc: linux-serial@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-amlogic@...ts.infradead.org, linux-kernel@...r.kernel.org,
Neil Armstrong <narmstrong@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Subject: [PATCH 1/3] dt-bindings: serial: amlogic,meson-uart: add fifo-size property
On most of the Amlogic SoCs, the first UART controller in the "Everything-Else"
power domain has 128bytes of RX & TX FIFO, so add an optional property to describe
a different FIFO size from the other ports (64bytes).
Signed-off-by: Neil Armstrong <narmstrong@...libre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
---
.../devicetree/bindings/serial/amlogic,meson-uart.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
index 75ebc9952a99..7487aa6ef849 100644
--- a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
+++ b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
@@ -55,6 +55,11 @@ properties:
- const: pclk
- const: baud
+ fifo-size:
+ description: The fifo size supported by the UART channel.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [64, 128]
+
required:
- compatible
- reg
--
2.25.1
Powered by blists - more mailing lists