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Message-ID: <20210519055555.GA27451@lst.de>
Date:   Wed, 19 May 2021 07:55:55 +0200
From:   Christoph Hellwig <hch@....de>
To:     Guo Ren <guoren@...nel.org>
Cc:     Christoph Hellwig <hch@....de>, Anup Patel <anup.patel@....com>,
        Palmer Dabbelt <palmerdabbelt@...gle.com>,
        drew@...gleboard.org, wefu@...hat.com, lazyparser@...il.com,
        linux-riscv <linux-riscv@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-arch <linux-arch@...r.kernel.org>,
        linux-sunxi@...ts.linux.dev, Guo Ren <guoren@...ux.alibaba.com>
Subject: Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support

On Wed, May 19, 2021 at 01:48:23PM +0800, Guo Ren wrote:
> The patchset just leaves a configuration chance for vendors. Before
> RISC-V ISA fixes it, we should give the chance to let vendor solve
> their real chip issues.

No.  The vendors need to work to get a feature standardized before
implementing it.  There is other way to have a sane kernel build that
supports all the different SOCs.

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