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Message-ID: <20210519084608.3d498169@jacob-builder>
Date: Wed, 19 May 2021 08:46:08 -0700
From: Jacob Pan <jacob.jun.pan@...ux.intel.com>
To: Jason Gunthorpe <jgg@...dia.com>
Cc: "Luck, Tony" <tony.luck@...el.com>,
Christoph Hellwig <hch@...radead.org>,
LKML <linux-kernel@...r.kernel.org>,
"iommu@...ts.linux-foundation.org" <iommu@...ts.linux-foundation.org>,
Joerg Roedel <joro@...tes.org>,
Lu Baolu <baolu.lu@...ux.intel.com>,
Jean-Philippe Brucker <jean-philippe@...aro.com>,
"Liu, Yi L" <yi.l.liu@...el.com>,
"Raj, Ashok" <ashok.raj@...el.com>,
"Tian, Kevin" <kevin.tian@...el.com>,
"Jiang, Dave" <dave.jiang@...el.com>,
"wangzhou1@...ilicon.com" <wangzhou1@...ilicon.com>,
"zhangfei.gao@...aro.org" <zhangfei.gao@...aro.org>,
"vkoul@...nel.org" <vkoul@...nel.org>,
David Woodhouse <dwmw2@...radead.org>,
jacob.jun.pan@...ux.intel.com
Subject: Re: [PATCH v4 1/2] iommu/sva: Tighten SVA bind API with explicit
flags
Hi Jason,
On Mon, 17 May 2021 11:37:58 -0300, Jason Gunthorpe <jgg@...dia.com> wrote:
> On Thu, May 13, 2021 at 04:40:28PM -0700, Jacob Pan wrote:
>
> > Looks like we are converging. Let me summarize the takeaways:
> > 1. Remove IOMMU_SVA_BIND_SUPERVISOR flag from this patch, in fact there
> > will be no flags at all for iommu_sva_bind_device()
> > 2. Remove all supervisor SVA related vt-d, idxd code.
> > 3. Create API iommu_setup_system_pasid_direct_map(option_flag)
> > if (option_flag == 1)
> > iommu_domain_alloc(IOMMU_DOMAIN_DMA);
> > if (option_flag == 2)
> > iommu_domain_alloc(IOMMU_DOMAIN_DIRECT); //new domain
> > type? setup IOMMU page tables mirroring the direct map
> > 4. Create API iommu_enable_dev_direct_map(struct dev, &pasid, &option)
> > - Drivers call this API to get the system PASID and which
> > option is available on the system PASID
> > - mark device as PASID only, perhaps a new flag in struct
> > device->dev_iommu->pasid_only = 1
> > 5. DMA API IOMMU vendor ops will take action based on the pasid_only
> > flag to decide if the mapping is for system PASID page tables.
> >
> > Does it make sense?
>
> I think you will run into trouble with that approach when you get to
> patches..
>
> For 'option 1' what you want is an API that is 'give me a PASID that
> is equivalent to the RID'.
>
> Then all the DMA API operations map IO page tables to both RID and
> PASID access. For the direct mode the PASID and RID will both point at
> the shared all physical memory IO page table.
>
> Otherwise the DMA API won't care if the device is using RID or PASID,
> if it needs to map a range it does it to the shared IO page table and
> flushes both the RID and PASID based caches.
>
> Then the driver will use the normal DMA API with its normal struct
> pci_device and simply tell the HW to do DMA TLP's with the returned
> PASID.
>
> For 'option 2' it should be a completely different API family.
>
Make sense, thanks for the suggestions.
> Jason
Thanks,
Jacob
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