linux-kernel - Re: [PATCH 5.12 06/45] ARM: 9058/1: cache-v7: refactor v7_invalidate

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Date:   Thu, 20 May 2021 12:59:36 +0200
From:   Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:     Ard Biesheuvel <ardb@...nel.org>
Cc:     Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        "# 3.4.x" <stable@...r.kernel.org>,
        Nicolas Pitre <nico@...xnic.net>,
        Russell King <rmk+kernel@...linux.org.uk>,
        Sasha Levin <sashal@...nel.org>
Subject: Re: [PATCH 5.12 06/45] ARM: 9058/1: cache-v7: refactor
 v7_invalidate_l1 to avoid clobbering r5/r6

On Thu, May 20, 2021 at 11:59:40AM +0200, Ard Biesheuvel wrote:
> On Thu, 20 May 2021 at 11:25, Greg Kroah-Hartman
> <gregkh@...uxfoundation.org> wrote:
> >
> > From: Ard Biesheuvel <ardb@...nel.org>
> >
> > [ Upstream commit f9e7a99fb6b86aa6a00e53b34ee6973840e005aa ]
> >
> > The cache invalidation code in v7_invalidate_l1 can be tweaked to
> > re-read the associativity from CCSIDR, and keep the way identifier
> > component in a single register that is assigned in the outer loop. This
> > way, we need 2 registers less.
> >
> > Given that the number of sets is typically much larger than the
> > associativity, rearrange the code so that the outer loop has the fewer
> > number of iterations, ensuring that the re-read of CCSIDR only occurs a
> > handful of times in practice.
> >
> > Fix the whitespace while at it, and update the comment to indicate that
> > this code is no longer a clone of anything else.
> >
> > Acked-by: Nicolas Pitre <nico@...xnic.net>
> > Signed-off-by: Ard Biesheuvel <ardb@...nel.org>
> > Signed-off-by: Russell King <rmk+kernel@...linux.org.uk>
> > Signed-off-by: Sasha Levin <sashal@...nel.org>
> 
> Please do NOT backport this to any stable trees.
> 
> It has no cc:stable tag
> It has no fixes: tag
> It was part of a 3 part series, but only the middle patch was selected.
> It touches ARM assembly that may assemble without problems but be
> completely broken at runtime when used out of the original intended
> context.

Now dropped from all stable queues, thanks for letting us know.

greg k-h