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Message-Id: <20210520155854.16547-1-michael@walle.cc>
Date: Thu, 20 May 2021 17:58:51 +0200
From: Michael Walle <michael@...le.cc>
To: linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org
Cc: Tudor Ambarus <tudor.ambarus@...rochip.com>,
Michael Walle <michael@...le.cc>,
Pratyush Yadav <p.yadav@...com>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>
Subject: [PATCH v3 0/3] mtd: spi-nor: otp: 4 byte mode fix and erase support
This series is the follow up on the single patch
mtd: spi-nor: implement OTP erase for Winbond and similar flashes
Pratyush Yadav discovered a likely problem with bigger flashes, the address
to access the security registers is either 3 or 4 byte (at least for
winbond flashes).
Changes since v2:
- fix 3/4 byte mode access
- use spi_nor_erase_sector() by swapping the nor->erase_opcode
- use more consistent wording regarding the security registers
Changes since v1:
- fixed kernel doc
There is also a patch for mtd-utils to add a small tool to issue
the erase:
https://lore.kernel.org/linux-mtd/20210510201319.25975-1-michael@walle.cc/
Michael Walle (3):
mtd: spi-nor: otp: fix access to security registers in 4 byte mode
mtd: spi-nor: otp: use more consistent wording
mtd: spi-nor: otp: implement erase for Winbond and similar flashes
drivers/mtd/spi-nor/core.c | 6 +--
drivers/mtd/spi-nor/core.h | 6 +++
drivers/mtd/spi-nor/otp.c | 79 +++++++++++++++++++++++++++++------
drivers/mtd/spi-nor/winbond.c | 1 +
4 files changed, 77 insertions(+), 15 deletions(-)
--
2.20.1
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