linux-kernel - Re: [PATCH 06/16] dt-bindings: arm: renesas,prr: Add new compatible string for RZ/G{L,LC,UL}

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Fri, 21 May 2021 15:25:34 +0200
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Magnus Damm <magnus.damm@...il.com>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Jiri Slaby <jirislaby@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        linux-clk <linux-clk@...r.kernel.org>,
        "open list:SERIAL DRIVERS" <linux-serial@...r.kernel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        Biju Das <biju.das.jz@...renesas.com>,
        Prabhakar <prabhakar.csengg@...il.com>
Subject: Re: [PATCH 06/16] dt-bindings: arm: renesas,prr: Add new compatible
 string for RZ/G{L,LC,UL}

Hi Prabhakar,

On Fri, May 14, 2021 at 9:23 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@...renesas.com> wrote:
> RZ/G2{L,LC,UL} SoC's have LSI_DEVID register to retrieve SoC product and
> revision information.
>
> RZ/G{L,LC,UL} SoC's have 28-bit product-id compared to other R-Car and
> RZ/G2{E,H,M,N} SoC's hence a new compatible string "renesas,devid" is
> added.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@...renesas.com>

Thanks for your patch!

> --- a/Documentation/devicetree/bindings/arm/renesas,prr.yaml
> +++ b/Documentation/devicetree/bindings/arm/renesas,prr.yaml
> @@ -12,14 +12,16 @@ maintainers:
>
>  description: |
>    Most Renesas ARM SoCs have a Product Register or Boundary Scan ID
> -  Register that allows to retrieve SoC product and revision information.
> -  If present, a device node for this register should be added.
> +  Register or LSI Device ID Register that allows to retrieve SoC product
> +  and revision information. If present, a device node for this register
> +  should be added.

Note that this register does not seem to be documented, so I have to
trust you on this.

However, from looking at the LSI DEVID register address, this does not
seem to be a lone register (like the Product Register on other SoCs),
but to be part of the System Controller (SYSC).  Hence I think there
should be separate bindings for the whole SYSC block instead.
You can still read the LSI DEVID register from renesas_soc_init(),
using the SYSC node.

Gr{oetje,eeting}s,

                        Geert


--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds