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Message-ID: <CAMuHMdXNzvTW920fJ2fKDWe=+CppfRdThKudTh51EW4fY2eRFg@mail.gmail.com>
Date: Fri, 21 May 2021 15:26:45 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Cc: Rob Herring <robh+dt@...nel.org>,
Magnus Damm <magnus.damm@...il.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
Jiri Slaby <jirislaby@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
linux-clk <linux-clk@...r.kernel.org>,
"open list:SERIAL DRIVERS" <linux-serial@...r.kernel.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
Biju Das <biju.das.jz@...renesas.com>,
Prabhakar <prabhakar.csengg@...il.com>,
Chris Brandt <Chris.Brandt@...esas.com>
Subject: Re: [PATCH 10/16] serial: sh-sci: Add support for RZ/G2L SoC
Hi Prabhakar,
On Fri, May 14, 2021 at 9:23 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@...renesas.com> wrote:
> From: Biju Das <biju.das.jz@...renesas.com>
>
> Add serial support for RZ/G2L SoC with earlycon and
> extended mode register support.
>
> Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Thanks for your patch!
> --- a/drivers/tty/serial/sh-sci.c
> +++ b/drivers/tty/serial/sh-sci.c
> @@ -306,6 +306,7 @@ static const struct sci_port_params sci_port_params[SCIx_NR_REGTYPES] = {
> [SCFDR] = { 0x0E, 16 },
> [SCSPTR] = { 0x10, 16 },
> [SCLSR] = { 0x12, 16 },
> + [SEMR] = { 0x14, 8 },
This is the parameter section for RZ/T and RZ/A2. Please update the
comments above, to say this also applies to RZ/G2L.
I can confirm the documentation for RZ/T1 and RZ/A2 agrees about the
existence and behavior of SEMR.
> },
> .fifosize = 16,
> .overrun_reg = SCLSR,
> @@ -2527,6 +2528,8 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
> case 27: smr_val |= SCSMR_SRC_27; break;
> }
> smr_val |= cks;
> + if (sci_getreg(port, SEMR)->size)
> + serial_port_out(port, SEMR, 0);
As this is done in both branches of the if() statement, I think it
should be moved up.
> serial_port_out(port, SCSCR, scr_val | s->hscif_tot);
> serial_port_out(port, SCSMR, smr_val);
> serial_port_out(port, SCBRR, brr);
> @@ -2561,6 +2564,8 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
> scr_val = s->cfg->scscr & (SCSCR_CKE1 | SCSCR_CKE0);
> smr_val |= serial_port_in(port, SCSMR) &
> (SCSMR_CKEDG | SCSMR_SRC_MASK | SCSMR_CKS);
> + if (sci_getreg(port, SEMR)->size)
> + serial_port_out(port, SEMR, 0);
(else branch)
> serial_port_out(port, SCSCR, scr_val | s->hscif_tot);
> serial_port_out(port, SCSMR, smr_val);
> }
> @@ -3170,6 +3175,10 @@ static const struct of_device_id of_sci_match[] = {
> .compatible = "renesas,scif-r7s9210",
> .data = SCI_OF_DATA(PORT_SCIF, SCIx_RZ_SCIFA_REGTYPE),
> },
> + {
> + .compatible = "renesas,scif-r9a07g044",
> + .data = SCI_OF_DATA(PORT_SCIF, SCIx_RZ_SCIFA_REGTYPE),
> + },
> /* Family-specific types */
> {
> .compatible = "renesas,rcar-gen1-scif",
The rest looks good to me.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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