linux-kernel - Re: [PATCH v3 04/17] dt-bindings: qcom-qce: Convert bindings to yaml

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Message-ID: <20210521014547.GA2469643@robh.at.kernel.org>
Date:   Thu, 20 May 2021 20:45:47 -0500
From:   Rob Herring <robh@...nel.org>
To:     Bhupesh Sharma <bhupesh.sharma@...aro.org>
Cc:     linux-arm-msm@...r.kernel.org,
        Thara Gopinath <thara.gopinath@...aro.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Andy Gross <agross@...nel.org>,
        Herbert Xu <herbert@...dor.apana.org.au>,
        "David S . Miller" <davem@...emloft.net>,
        Stephen Boyd <sboyd@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Vinod Koul <vkoul@...nel.org>, dmaengine@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-crypto@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        bhupesh.linux@...il.com
Subject: Re: [PATCH v3 04/17] dt-bindings: qcom-qce: Convert bindings to yaml

On Wed, May 19, 2021 at 08:06:47PM +0530, Bhupesh Sharma wrote:
> Convert Qualcomm QCE crypto devicetree binding to YAML.
> 
> Cc: Thara Gopinath <thara.gopinath@...aro.org>
> Cc: Bjorn Andersson <bjorn.andersson@...aro.org>
> Cc: Rob Herring <robh+dt@...nel.org>
> Cc: Andy Gross <agross@...nel.org>
> Cc: Herbert Xu <herbert@...dor.apana.org.au>
> Cc: David S. Miller <davem@...emloft.net>
> Cc: Stephen Boyd <sboyd@...nel.org>
> Cc: Michael Turquette <mturquette@...libre.com>
> Cc: Vinod Koul <vkoul@...nel.org>
> Cc: dmaengine@...r.kernel.org
> Cc: linux-clk@...r.kernel.org
> Cc: linux-crypto@...r.kernel.org
> Cc: devicetree@...r.kernel.org
> Cc: linux-kernel@...r.kernel.org
> Cc: bhupesh.linux@...il.com
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...aro.org>
> ---
>  .../devicetree/bindings/crypto/qcom-qce.txt   | 25 -------
>  .../devicetree/bindings/crypto/qcom-qce.yaml  | 69 +++++++++++++++++++
>  2 files changed, 69 insertions(+), 25 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/crypto/qcom-qce.txt
>  create mode 100644 Documentation/devicetree/bindings/crypto/qcom-qce.yaml
> 
> diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.txt b/Documentation/devicetree/bindings/crypto/qcom-qce.txt
> deleted file mode 100644
> index fdd53b184ba8..000000000000
> --- a/Documentation/devicetree/bindings/crypto/qcom-qce.txt
> +++ /dev/null
> @@ -1,25 +0,0 @@
> -Qualcomm crypto engine driver
> -
> -Required properties:
> -
> -- compatible  : should be "qcom,crypto-v5.1"
> -- reg         : specifies base physical address and size of the registers map
> -- clocks      : phandle to clock-controller plus clock-specifier pair
> -- clock-names : "iface" clocks register interface
> -                "bus" clocks data transfer interface
> -                "core" clocks rest of the crypto block
> -- dmas        : DMA specifiers for tx and rx dma channels. For more see
> -                Documentation/devicetree/bindings/dma/dma.txt
> -- dma-names   : DMA request names should be "rx" and "tx"
> -
> -Example:
> -	crypto@...5a000 {
> -		compatible = "qcom,crypto-v5.1";
> -		reg = <0xfd45a000 0x6000>;
> -		clocks = <&gcc GCC_CE2_AHB_CLK>,
> -			 <&gcc GCC_CE2_AXI_CLK>,
> -			 <&gcc GCC_CE2_CLK>;
> -		clock-names = "iface", "bus", "core";
> -		dmas = <&cryptobam 2>, <&cryptobam 3>;
> -		dma-names = "rx", "tx";
> -	};
> diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
> new file mode 100644
> index 000000000000..a691cd08f372
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
> @@ -0,0 +1,69 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/crypto/qcom-qce.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm crypto engine driver
> +
> +maintainers:
> +  - Bhupesh Sharma <bhupesh.sharma@...aro.org>
> +
> +description: |
> +  This document defines the binding for the QCE crypto
> +  controller found on Qualcomm parts.
> +
> +properties:
> +  compatible:
> +    const: qcom,crypto-v5.1
> +
> +  reg:
> +    maxItems: 1
> +    description: |
> +      Specifies base physical address and size of the registers map.

Yep, that's every 'reg'. Drop.

With that dropped,

Reviewed-by: Rob Herring <robh@...nel.org>

> +
> +  clocks:
> +    items:
> +      - description: iface clocks register interface.
> +      - description: bus clocks data transfer interface.
> +      - description: core clocks rest of the crypto block.
> +
> +  clock-names:
> +    items:
> +      - const: iface
> +      - const: bus
> +      - const: core
> +
> +  dmas:
> +    items:
> +      - description: DMA specifiers for tx dma channel.
> +      - description: DMA specifiers for rx dma channel.
> +
> +  dma-names:
> +    items:
> +      - const: rx
> +      - const: tx
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - clock-names
> +  - dmas
> +  - dma-names
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/qcom,gcc-apq8084.h>
> +    crypto-engine@...5a000 {
> +        compatible = "qcom,crypto-v5.1";
> +        reg = <0xfd45a000 0x6000>;
> +        clocks = <&gcc GCC_CE2_AHB_CLK>,
> +                 <&gcc GCC_CE2_AXI_CLK>,
> +                 <&gcc GCC_CE2_CLK>;
> +        clock-names = "iface", "bus", "core";
> +        dmas = <&cryptobam 2>, <&cryptobam 3>;
> +        dma-names = "rx", "tx";
> +    };
> -- 
> 2.31.1
>