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Message-ID: <9963bd19-5d3b-906e-e42f-1aeb266d6374@intel.com>
Date:   Mon, 24 May 2021 11:29:00 -0700
From:   Dave Hansen <dave.hansen@...el.com>
To:     Len Brown <lenb@...nel.org>, Andy Lutomirski <luto@...nel.org>
Cc:     "Chang S. Bae" <chang.seok.bae@...el.com>,
        Borislav Petkov <bp@...e.de>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...nel.org>, X86 ML <x86@...nel.org>,
        "Brown, Len" <len.brown@...el.com>,
        "Liu, Jing2" <jing2.liu@...el.com>,
        "Ravi V. Shankar" <ravi.v.shankar@...el.com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5 25/28] x86/fpu/xstate: Skip writing zeros to signal
 frame for dynamic user states if in INIT-state

On 5/24/21 11:15 AM, Len Brown wrote:
> On Sun, May 23, 2021 at 11:28 PM Andy Lutomirski <luto@...nel.org> wrote:
>> But what happens if we don't have the XGETBV1 feature?  Are we making
>> AMX support depend on XGETBV1?
> 
> Yes, AMX systems always have XGETBV.

XGETBV1 support is actually separate from the XGETBV instruction itself.
 XGETBV1 even has its own CPUID bit.

This means that a silly hypervisor or lazy future hardware
implementation could decide to enumerate support for AMX and neglect
XGETBV1.

But, it's perfectly fine to have our AMX support depend on XGETBV1.  We
even have a little dependency checker table which will clear the AMX
feature in the presence of one of those silly hypervisors.

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