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Message-ID: <20210524214622.GI15545@willie-the-truck>
Date: Mon, 24 May 2021 22:46:22 +0100
From: Will Deacon <will@...nel.org>
To: Qais Yousef <qais.yousef@....com>
Cc: linux-arm-kernel@...ts.infradead.org, linux-arch@...r.kernel.org,
linux-kernel@...r.kernel.org,
Catalin Marinas <catalin.marinas@....com>,
Marc Zyngier <maz@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Peter Zijlstra <peterz@...radead.org>,
Morten Rasmussen <morten.rasmussen@....com>,
Suren Baghdasaryan <surenb@...gle.com>,
Quentin Perret <qperret@...gle.com>, Tejun Heo <tj@...nel.org>,
Li Zefan <lizefan@...wei.com>,
Johannes Weiner <hannes@...xchg.org>,
Ingo Molnar <mingo@...hat.com>,
Juri Lelli <juri.lelli@...hat.com>,
Vincent Guittot <vincent.guittot@...aro.org>,
"Rafael J. Wysocki" <rjw@...ysocki.net>, kernel-team@...roid.com
Subject: Re: [PATCH v6 21/21] Documentation: arm64: describe asymmetric
32-bit support
On Fri, May 21, 2021 at 06:37:21PM +0100, Qais Yousef wrote:
> On 05/18/21 10:47, Will Deacon wrote:
> > Document support for running 32-bit tasks on asymmetric 32-bit systems
> > and its impact on the user ABI when enabled.
> >
> > Signed-off-by: Will Deacon <will@...nel.org>
> > ---
> > .../admin-guide/kernel-parameters.txt | 3 +
> > Documentation/arm64/asymmetric-32bit.rst | 149 ++++++++++++++++++
> > Documentation/arm64/index.rst | 1 +
> > 3 files changed, 153 insertions(+)
> > create mode 100644 Documentation/arm64/asymmetric-32bit.rst
> >
>
> [...]
>
> > +Cpusets
> > +-------
> > +
> > +The affinity of a 32-bit task may include CPUs that are not explicitly
> > +allowed by the cpuset to which it is attached. This can occur as a
> > +result of the following two situations:
> > +
> > + - A 64-bit task attached to a cpuset which allows only 64-bit CPUs
> > + executes a 32-bit program.
> > +
> > + - All of the 32-bit-capable CPUs allowed by a cpuset containing a
> > + 32-bit task are offlined.
> > +
> > +In both of these cases, the new affinity is calculated according to step
> > +(2) of the process described in `execve(2)`_ and the cpuset hierarchy is
> > +unchanged irrespective of the cgroup version.
>
> nit: Should we call out that we're breaking cpuset-v1 behavior? Don't feel
> strongly about it.
I think the text is pretty clear that the new behaviour documented here
applies to cpuset-v1 and I wouldn't say we're breaking anything as we're not
changing any of the existing behaviours.
Will
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