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Message-ID: <877djmwxbd.wl-maz@kernel.org>
Date: Tue, 25 May 2021 18:13:58 +0100
From: Marc Zyngier <maz@...nel.org>
To: Will Deacon <will@...nel.org>
Cc: linux-arm-kernel@...ts.infradead.org, linux-arch@...r.kernel.org,
linux-kernel@...r.kernel.org,
Catalin Marinas <catalin.marinas@....com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Peter Zijlstra <peterz@...radead.org>,
Morten Rasmussen <morten.rasmussen@....com>,
Qais Yousef <qais.yousef@....com>,
Suren Baghdasaryan <surenb@...gle.com>,
Quentin Perret <qperret@...gle.com>, Tejun Heo <tj@...nel.org>,
Johannes Weiner <hannes@...xchg.org>,
Ingo Molnar <mingo@...hat.com>,
Juri Lelli <juri.lelli@...hat.com>,
Vincent Guittot <vincent.guittot@...aro.org>,
"Rafael J. Wysocki" <rjw@...ysocki.net>,
Dietmar Eggemann <dietmar.eggemann@....com>,
Daniel Bristot de Oliveira <bristot@...hat.com>,
kernel-team@...roid.com
Subject: Re: [PATCH v7 22/22] Documentation: arm64: describe asymmetric 32-bit support
On Tue, 25 May 2021 16:14:32 +0100,
Will Deacon <will@...nel.org> wrote:
>
> Document support for running 32-bit tasks on asymmetric 32-bit systems
> and its impact on the user ABI when enabled.
>
> Signed-off-by: Will Deacon <will@...nel.org>
> ---
> .../admin-guide/kernel-parameters.txt | 3 +
> Documentation/arm64/asymmetric-32bit.rst | 154 ++++++++++++++++++
> Documentation/arm64/index.rst | 1 +
> 3 files changed, 158 insertions(+)
> create mode 100644 Documentation/arm64/asymmetric-32bit.rst
>
[...]
> +KVM
> +---
> +
> +Although KVM will not advertise 32-bit EL0 support to any vCPUs on an
> +asymmetric system, a broken guest at EL1 could still attempt to execute
> +32-bit code at EL0. In this case, an exit from a vCPU thread in 32-bit
> +mode will return to host userspace with an ``exit_reason`` of
> +``KVM_EXIT_FAIL_ENTRY``.
Nit: there is a bit more to it. The vcpu will be left in a permanent
non-runnable state until KVM_ARM_VCPU_INIT is issued to reset the vcpu
into a saner state.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
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