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Message-Id: <20210525200246.118323-2-konrad.dybcio@somainline.org>
Date: Tue, 25 May 2021 22:02:40 +0200
From: Konrad Dybcio <konrad.dybcio@...ainline.org>
To: ~postmarketos/upstreaming@...ts.sr.ht
Cc: martin.botka@...ainline.org,
angelogioacchino.delregno@...ainline.org,
marijn.suijten@...ainline.org, jamipkettunen@...ainline.org,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH 2/7] arm64: dts: qcom: Add MSM8996v3.0 DTSI file
Add an overlay for MSM8996v3.0, which is a pre-final revision
of the said SoC. It has some stark differences with regards to
GPU, or more specifically its power delivery path. Oh, and of
course a different msm-id.
Signed-off-by: Konrad Dybcio <konrad.dybcio@...ainline.org>
---
arch/arm64/boot/dts/qcom/msm8996-v3.0.dtsi | 59 ++++++++++++++++++++++
1 file changed, 59 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/msm8996-v3.0.dtsi
diff --git a/arch/arm64/boot/dts/qcom/msm8996-v3.0.dtsi b/arch/arm64/boot/dts/qcom/msm8996-v3.0.dtsi
new file mode 100644
index 000000000000..b46f10b7413a
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm8996-v3.0.dtsi
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021, Konrad Dybcio <konrad.dybcio@...ainline.org>
+ */
+
+#include "msm8996.dtsi"
+
+ / {
+ qcom,msm-id = <246 0x30000>;
+ };
+
+ /*
+ * This revision seems to have differ GPU CPR
+ * parameters, GPU frequencies and some differences
+ * when it comes to voltage delivery to.. once again
+ * the GPU. Funnily enough, it's simpler to make it an
+ * overlay on top of 3.1 (the final one) than vice versa.
+ * The differences will show here as more and more
+ * features get enabled upstream.
+ */
+
+gpu_opp_table_3_0: gpu-opp-table-30 {
+ compatible = "operating-points-v2";
+
+ opp-624000000 {
+ opp-hz = /bits/ 64 <624000000>;
+ opp-level = <7>;
+ };
+
+ opp-560000000 {
+ opp-hz = /bits/ 64 <560000000>;
+ opp-level = <6>;
+ };
+
+ opp-510000000 {
+ opp-hz = /bits/ 64 <510000000>;
+ opp-level = <5>;
+ };
+
+ opp-401800000 {
+ opp-hz = /bits/ 64 <401800000>;
+ opp-level = <4>;
+ };
+
+ opp-315000000 {
+ opp-hz = /bits/ 64 <315000000>;
+ opp-level = <3>;
+ };
+
+ opp-214000000 {
+ opp-hz = /bits/ 64 <214000000>;
+ opp-level = <3>;
+ };
+
+ opp-133000000 {
+ opp-hz = /bits/ 64 <133000000>;
+ opp-level = <3>;
+ };
+};
--
2.31.1
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