linux-kernel - Re: [PATCH v6 18/21] arm64: Prevent offlining first CPU with 32-bit EL0 on mismatched system

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <20210525094346.GB15564@arm.com>
Date:   Tue, 25 May 2021 10:43:46 +0100
From:   Catalin Marinas <catalin.marinas@....com>
To:     Will Deacon <will@...nel.org>
Cc:     linux-arm-kernel@...ts.infradead.org, linux-arch@...r.kernel.org,
        linux-kernel@...r.kernel.org, Marc Zyngier <maz@...nel.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Peter Zijlstra <peterz@...radead.org>,
        Morten Rasmussen <morten.rasmussen@....com>,
        Qais Yousef <qais.yousef@....com>,
        Suren Baghdasaryan <surenb@...gle.com>,
        Quentin Perret <qperret@...gle.com>, Tejun Heo <tj@...nel.org>,
        Li Zefan <lizefan@...wei.com>,
        Johannes Weiner <hannes@...xchg.org>,
        Ingo Molnar <mingo@...hat.com>,
        Juri Lelli <juri.lelli@...hat.com>,
        Vincent Guittot <vincent.guittot@...aro.org>,
        "Rafael J. Wysocki" <rjw@...ysocki.net>, kernel-team@...roid.com
Subject: Re: [PATCH v6 18/21] arm64: Prevent offlining first CPU with 32-bit
 EL0 on mismatched system

On Mon, May 24, 2021 at 09:32:50PM +0100, Will Deacon wrote:
> On Mon, May 24, 2021 at 04:46:58PM +0100, Catalin Marinas wrote:
> > On Tue, May 18, 2021 at 10:47:22AM +0100, Will Deacon wrote:
> > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> > > index 959442f76ed7..72efdc611b14 100644
> > > --- a/arch/arm64/kernel/cpufeature.c
> > > +++ b/arch/arm64/kernel/cpufeature.c
> > > @@ -2896,15 +2896,33 @@ void __init setup_cpu_features(void)
> > >  
> > >  static int enable_mismatched_32bit_el0(unsigned int cpu)
> > >  {
> > > +	static int lucky_winner = -1;
> > > +
> > >  	struct cpuinfo_arm64 *info = &per_cpu(cpu_data, cpu);
> > >  	bool cpu_32bit = id_aa64pfr0_32bit_el0(info->reg_id_aa64pfr0);
> > >  
> > >  	if (cpu_32bit) {
> > >  		cpumask_set_cpu(cpu, cpu_32bit_el0_mask);
> > >  		static_branch_enable_cpuslocked(&arm64_mismatched_32bit_el0);
> > > -		setup_elf_hwcaps(compat_elf_hwcaps);
> > >  	}
> > >  
> > > +	if (cpumask_test_cpu(0, cpu_32bit_el0_mask) == cpu_32bit)
> > > +		return 0;
> > 
> > I don't fully understand this early return. AFAICT, we still call
> > setup_elf_hwcaps() via setup_cpu_features() if the system supports
> > 32-bit EL0 (mismatched or not) at boot. For CPU hotplug, we can add the
> > compat hwcaps later if we didn't set them up at boot. So this part is
> > fine.
> > 
> > However, if CPU0 is 32-bit-capable, it looks like we'd never disable the
> > offlining on any of the 32-bit-capable CPUs and there's nothing that
> > prevents offlining CPU0.
> 
> That is also deferred until we actually detect the mismatch. For example, if
> CPU0 is 32-bit capable but none of the others are, then when we online CPU1
> we will print:
> 
>   | CPU features: Asymmetric 32-bit EL0 support detected on CPU 1; CPU hot-unplug disabled on CPU 0
> 
> so the check above is really asking "Is the CPU being onlined mismatched wrt
> the boot CPU?". If yes, then we need to make sure that we're keeping a
> 32-bit-capable CPU around.

Got it now, the offlining will only be disabled if we detected a
mismatch. For this patch:

Reviewed-by: Catalin Marinas <catalin.marinas@....com>