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Message-Id: <1621937466-1502-5-git-send-email-skakit@codeaurora.org>
Date:   Tue, 25 May 2021 15:40:59 +0530
From:   satya priya <skakit@...eaurora.org>
To:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Rob Herring <robh+dt@...nel.org>
Cc:     mka@...omium.org, Lee Jones <lee.jones@...aro.org>,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, kgunda@...eaurora.org,
        satya priya <skakit@...eaurora.org>
Subject: [PATCH V5 04/11] arm64: dts: qcom: pm8350c: Correct the GPIO node

Add gpio ranges and correct the compatible to add
"qcom,spmi-gpio" as this pmic is on spmi bus.

Signed-off-by: satya priya <skakit@...eaurora.org>
---
Changes in V5:
 - This is split from patch [3/11] and added newly in V5.

 arch/arm64/boot/dts/qcom/pm8350c.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/pm8350c.dtsi b/arch/arm64/boot/dts/qcom/pm8350c.dtsi
index f926508..e1b75ae 100644
--- a/arch/arm64/boot/dts/qcom/pm8350c.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8350c.dtsi
@@ -21,9 +21,10 @@
 		};
 
 		pm8350c_gpios: gpio@...0 {
-			compatible = "qcom,pm8350c-gpio";
+			compatible = "qcom,pm8350c-gpio", "qcom,spmi-gpio";
 			reg = <0x8800>;
 			gpio-controller;
+			gpio-ranges = <&pm8350c_gpios 0 0 9>;
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
of Code Aurora Forum, hosted by The Linux Foundation

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