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Message-ID: <CACRpkdaSr_CV1pKS44Ru15AEJ0-1429+6E7Lei2sPHdaijr9iw@mail.gmail.com>
Date: Thu, 27 May 2021 00:46:42 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Matti Vaittinen <matti.vaittinen@...rohmeurope.com>
Cc: Matti Vaittinen <mazziesaccount@...il.com>,
Bartosz Golaszewski <bgolaszewski@...libre.com>,
Michael Walle <michael@...le.cc>,
Florian Fainelli <f.fainelli@...il.com>,
bcm-kernel-feedback-list <bcm-kernel-feedback-list@...adcom.com>,
Jonas Gorski <jonas.gorski@...il.com>,
Álvaro Fernández Rojas <noltari@...il.com>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
linux-power@...rohmeurope.com,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
Andy Shevchenko <andy.shevchenko@...il.com>
Subject: Re: [PATCH v4 0/3] gpio: gpio-regmap: Support few custom operations
On Wed, May 26, 2021 at 8:02 AM Matti Vaittinen
<matti.vaittinen@...rohmeurope.com> wrote:
> Support providing some IC specific operations at gpio_regmap registration.
I see there is some discussion around the abstractions here.
I can only say how we designed gpio-mmio.c (CONFIG_GPIO_GENERIC).
It was designed for GPIO controllers with 8, 16 or 32 bits of GPIO,
each stuffed in a consecutive bit in a set of registers. We later
amended it to deal with bigendian as well, and 64 bit registers,
and some quirks around the registers (like just readable etc).
But that's it. For anything more complex we have opted for
users to write their own drivers with elaborate code.
As library it can sometimes be combined with an irqchip,
if the interrupts are simple.
But overall: each GPIO needs to be a single bit, not 2 not 3
not in every 7th register etc.
I would not try to turn gpio regmap into a Rube Goldberg Machine
panacea-fit-all for all kinds of register and bit layouts, it's nice to
be able to combine it with an interrupt chip or pin controller if those
functions are also simple, like the set/get registers.
Any too bold ambitions will be hard to maintain, I think.
Yours,
Linus Walleij
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