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Message-ID: <CACRpkdZ2bDDNecLc5sEe36KyJCBqAo5-vZdvwM+V2a33tr4w_g@mail.gmail.com>
Date:   Thu, 27 May 2021 01:19:36 +0200
From:   Linus Walleij <linus.walleij@...aro.org>
To:     lakshmi.sowjanya.d@...el.com,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc:     "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        "Raja Subramanian, Lakshmi Bai" 
        <lakshmi.bai.raja.subramanian@...el.com>, tamal.saha@...el.com
Subject: Re: [PATCH 1/2] dt-bindings: pinctrl: Add bindings for Intel Keembay
 pinctrl driver

On Mon, May 24, 2021 at 11:26 AM <lakshmi.sowjanya.d@...el.com> wrote:

> From: "D, Lakshmi Sowjanya" <lakshmi.sowjanya.d@...el.com>
>
> Add Device Tree bindings documentation for Intel Keem Bay
> SoC's pin controller.
> Add entry for INTEL Keem Bay pinctrl driver in MAINTAINERS file
>
> Signed-off-by: Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@...el.com>
> Signed-off-by: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@...el.com>
> Signed-off-by: D, Lakshmi Sowjanya <lakshmi.sowjanya.d@...el.com>
> Acked-by: Mark Gross <mgross@...ux.intel.com>

So since this thing has device tree bindings I suppose it is one
of those intel-but-not-x86-and-not-acpi things that Andy should
not merge through his tree?

I bet he wants to take a look though, so keep Andy posted.

Yours,
Linus Walleij

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