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Message-ID: <YK32Mmiq9QXGkELF@atomide.com>
Date:   Wed, 26 May 2021 10:18:10 +0300
From:   Tony Lindgren <tony@...mide.com>
To:     Rob Herring <robh+dt@...nel.org>
Cc:     Sven Peter <sven@...npeter.dev>, devicetree@...r.kernel.org,
        linux-clk <linux-clk@...r.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Hector Martin <marcan@...can.st>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Mark Kettenis <mark.kettenis@...all.nl>,
        Arnd Bergmann <arnd@...nel.org>
Subject: Re: [PATCH 0/3] Apple M1 clock gate driver

Hi,

* Rob Herring <robh+dt@...nel.org> [210525 18:09]:
> I would do a single node per mmio region with the register offset (or
> offset / 4) being the clock id. This can still support new SoCs easily
> if you have a fallback compatible. If you want/need to get all the
> clocks, just walk the DT 'clocks' properties and extract all the IDs.

I mostly agree.. Except I'd also leave out the artificial clock ID and
just use real register offsets from the clock controller base instead.

So a single clock controller node for each MMIO range, then set
#clock=cells = <1>. Then the binding follows what we have for the
interrupts-extended binding for example.

If the clock controller optionally needs some data in the dts,
that can be added to the clock controller node. Or it can be driver
internal built-in data. If the data for dts can be described in a
generic way, even better :)

This would make the consumer interface look like below with a
clock controller node and register offset from it:

clocks = <&clock_controller1 0x1234>;

Regards,

Tony



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