[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20210527001610.10553-1-yao.jin@linux.intel.com>
Date: Thu, 27 May 2021 08:16:02 +0800
From: Jin Yao <yao.jin@...ux.intel.com>
To: acme@...nel.org, jolsa@...nel.org, peterz@...radead.org,
mingo@...hat.com, alexander.shishkin@...ux.intel.com
Cc: Linux-kernel@...r.kernel.org, ak@...ux.intel.com,
kan.liang@...el.com, yao.jin@...el.com,
Jin Yao <yao.jin@...ux.intel.com>
Subject: [PATCH v2 0/8] perf: Support perf-mem/perf-c2c for AlderLake
AlderLake uses a hybrid architecture utilizing Golden Cove cores
(core CPU) and Gracemont cores (atom CPU). This patchset supports
perf-mem and perf-c2c for AlderLake.
v2:
---
- Use mem_loads_name__init to keep original behavior for non-hybrid platform.
- Move x86 specific perf_mem_events[] to arch/x86/util/mem-events.c.
- Move mem-store event to a new patch.
- Add a new patch to fix wrong verbose output for recording events
- Add a new patch to disable 'mem-loads-aux' group before reporting
Jin Yao (8):
perf tools: Check mem-loads auxiliary event
perf tools: Support pmu prefix for mem-load event
perf tools: Support pmu prefix for mem-store event
perf tools: Check if mem_events is supported for hybrid platform
perf mem: Support record for hybrid platform
perf mem: Fix wrong verbose output for recording events
perf mem: Disable 'mem-loads-aux' group before reporting
perf c2c: Support record for hybrid platform
tools/perf/arch/arm64/util/mem-events.c | 2 +-
tools/perf/arch/powerpc/util/mem-events.c | 2 +-
tools/perf/arch/x86/util/mem-events.c | 54 ++++++++++--
tools/perf/builtin-c2c.c | 40 +++++----
tools/perf/builtin-mem.c | 51 ++++++-----
tools/perf/builtin-report.c | 2 +
tools/perf/util/evlist.c | 25 ++++++
tools/perf/util/evlist.h | 1 +
tools/perf/util/mem-events.c | 101 ++++++++++++++++++++--
tools/perf/util/mem-events.h | 4 +-
10 files changed, 225 insertions(+), 57 deletions(-)
--
2.17.1
Powered by blists - more mailing lists