linux-kernel - Re: [PATCH v1 2/4] ARM: dts: aspeed-g6: Add SGPIO node.

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Message-Id: <69b31043-957c-40af-9ab9-6bcc63ccdc85@www.fastmail.com>
Date:   Thu, 27 May 2021 10:57:43 +0930
From:   "Andrew Jeffery" <andrew@...id.au>
To:     "Steven Lee" <steven_lee@...eedtech.com>,
        "Linus Walleij" <linus.walleij@...aro.org>,
        "Bartosz Golaszewski" <bgolaszewski@...libre.com>,
        "Rob Herring" <robh+dt@...nel.org>,
        "Joel Stanley" <joel@....id.au>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        "moderated list:ARM/ASPEED MACHINE SUPPORT" 
        <linux-arm-kernel@...ts.infradead.org>,
        "moderated list:ARM/ASPEED MACHINE SUPPORT" 
        <linux-aspeed@...ts.ozlabs.org>,
        "open list" <linux-kernel@...r.kernel.org>
Cc:     "Hongwei Zhang" <Hongweiz@....com>,
        "Ryan Chen" <ryan_chen@...eedtech.com>,
        "Billy Tsai" <billy_tsai@...eedtech.com>
Subject: Re: [PATCH v1 2/4] ARM: dts: aspeed-g6: Add SGPIO node.

Hi Steven,

On Wed, 26 May 2021, at 19:16, Steven Lee wrote:
> AST2600 supports 2 SGPIO master interfaces one with 128 pins another one
> with 80 pins.

Is there any chance the serial GPIO controllers can be explicitly 
listed in the Memory Space Allocation Table of the datasheet? Currently 
they're covered by the entry for "GPIO Controller (Parallel GPIO)" 
which is listed as ranging from 0x1e780000-0x1e7807ff.

Admittedly the details are listed in chapter 41 for the GPIO 
Controller, but it would be handy to not have to dig.

> 
> Signed-off-by: Steven Lee <steven_lee@...eedtech.com>
> ---
>  arch/arm/boot/dts/aspeed-g6.dtsi | 32 ++++++++++++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
> index f96607b7b4e2..556ce9535c22 100644
> --- a/arch/arm/boot/dts/aspeed-g6.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g6.dtsi
> @@ -377,6 +377,38 @@
>  				#interrupt-cells = <2>;
>  			};
>  
> +			sgpiom0: sgpiom@...80500 {
> +				#gpio-cells = <2>;
> +				gpio-controller;
> +				compatible = "aspeed,ast2600-sgpiom";
> +				reg = <0x1e780500 0x100>;
> +				interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
> +				max-ngpios = <128>;

I need to think more about this one.

Andrew