linux-kernel - [RESEND PATCH V1 2/5] PCI: tegra: Fix MSI-X programming

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Message-ID: <20210527115246.20509-3-omp@nvidia.com>
Date:   Thu, 27 May 2021 17:22:43 +0530
From:   Om Prakash Singh <omp@...dia.com>
To:     <vidyas@...dia.com>, <lorenzo.pieralisi@....com>,
        <bhelgaas@...gle.com>, <thierry.reding@...il.com>,
        <jonathanh@...dia.com>
CC:     <linux-tegra@...r.kernel.org>, <linux-pci@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <kthota@...dia.com>,
        <mmaddireddy@...dia.com>, Om Prakash Singh <omp@...dia.com>
Subject: [RESEND PATCH V1 2/5] PCI: tegra: Fix MSI-X programming

Lower order MSI-X address is programmed in MSIX_ADDR_MATCH_HIGH_OFF
DBI register instead of higher order address. This patch fixes this
programming mistake.

Signed-off-by: Om Prakash Singh <omp@...dia.com>
---
 drivers/pci/controller/dwc/pcie-tegra194.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index c51d666c9d87..58fc2615014d 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1863,7 +1863,7 @@ static void pex_ep_event_pex_rst_deassert(struct tegra_pcie_dw *pcie)
 	val = (ep->msi_mem_phys & MSIX_ADDR_MATCH_LOW_OFF_MASK);
 	val |= MSIX_ADDR_MATCH_LOW_OFF_EN;
 	dw_pcie_writel_dbi(pci, MSIX_ADDR_MATCH_LOW_OFF, val);
-	val = (lower_32_bits(ep->msi_mem_phys) & MSIX_ADDR_MATCH_HIGH_OFF_MASK);
+	val = (upper_32_bits(ep->msi_mem_phys) & MSIX_ADDR_MATCH_HIGH_OFF_MASK);
 	dw_pcie_writel_dbi(pci, MSIX_ADDR_MATCH_HIGH_OFF, val);
 
 	ret = dw_pcie_ep_init_complete(ep);
-- 
2.17.1