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Message-Id: <cover.1622119892.git.cristian.ciocaltea@gmail.com>
Date: Thu, 27 May 2021 16:16:38 +0300
From: Cristian Ciocaltea <cristian.ciocaltea@...il.com>
To: Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Andreas Färber <afaerber@...e.de>,
Michael Turquette <mturquette@...libre.com>,
Edgar Bernardi Righi <edgar.righi@...tec.org.br>
Cc: linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-actions@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: [PATCH v2 0/6] Improve clock support for Actions S500 SoC
While working on a driver to support the Actions Semi Owl Ethernet MAC,
I found and fixed some issues on the existing implementation of the S500
SoC clock subsystem and, additionally, I added two missing clocks.
Thanks,
Cristi
Changes in v2 (according to Mani's review):
- Re-added entry "{ 24, 1, 25 }" to sd_factor_table, according to the
datasheet (V1.8+), this is a valid divider
- Re-added OWL_GATE_HW to SENSOR[0-1], according to the datasheet they
are gated, even though the vendor implementation states the opposite
- Reverted the addition of the clock div table for H clock to support the
'1' divider (according to the datasheet), even though the vendor
implementation marks it as reserved
- Reordered "nic_clk_mux_p" after "ahbprediv_clk_mux_p" to follow the reg
field ordering
- Rebased patch series on v5.13-rc3
Cristian Ciocaltea (6):
clk: actions: Fix UART clock dividers on Owl S500 SoC
clk: actions: Fix SD clocks factor table on Owl S500 SoC
clk: actions: Fix bisp_factor_table based clocks on Owl S500 SoC
clk: actions: Fix AHPPREDIV-H-AHB clock chain on Owl S500 SoC
dt-bindings: clock: Add NIC and ETHERNET bindings for Actions S500 SoC
clk: actions: Add NIC and ETHERNET clock support for Actions S500 SoC
drivers/clk/actions/owl-s500.c | 92 +++++++++++++-------
include/dt-bindings/clock/actions,s500-cmu.h | 6 +-
2 files changed, 65 insertions(+), 33 deletions(-)
--
2.31.1
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