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Message-Id: <20210528140736.79686-1-knaerzche@gmail.com>
Date: Fri, 28 May 2021 16:07:36 +0200
From: Alex Bee <knaerzche@...il.com>
To: Heiko Stuebner <heiko@...ech.de>, linux-clk@...r.kernel.org,
linux-rockchip@...ts.infradead.org
Cc: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Alex Bee <knaerzche@...il.com>
Subject: [PATCH] clk: rockchip: export ACLK_VCODEC for RK3036
It is required for the series at [1] to let hantro driver aquire the
clock and set the rate for RK3036 correctly, but I didn't want to
add a patch for yet another subsystem to this series.
[1] https://lore.kernel.org/linux-media/20210525152225.154302-1-knaerzche@gmail.com/
Signed-off-by: Alex Bee <knaerzche@...il.com>
---
drivers/clk/rockchip/clk-rk3036.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3036.c b/drivers/clk/rockchip/clk-rk3036.c
index 91d56ad45817..614845cc5b4a 100644
--- a/drivers/clk/rockchip/clk-rk3036.c
+++ b/drivers/clk/rockchip/clk-rk3036.c
@@ -259,7 +259,7 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = {
RK2928_CLKGATE_CON(1), 13, GFLAGS,
&rk3036_uart2_fracmux),
- COMPOSITE(0, "aclk_vcodec", mux_pll_src_3plls_p, 0,
+ COMPOSITE(ACLK_VCODEC, "aclk_vcodec", mux_pll_src_3plls_p, 0,
RK2928_CLKSEL_CON(32), 14, 2, MFLAGS, 8, 5, DFLAGS,
RK2928_CLKGATE_CON(3), 11, GFLAGS),
FACTOR_GATE(HCLK_VCODEC, "hclk_vcodec", "aclk_vcodec", 0, 1, 4,
--
2.27.0
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