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Message-ID: <b00306ad-e9fa-0fb3-1901-61bdf94cc887@codeaurora.org>
Date:   Mon, 31 May 2021 12:56:05 +0530
From:   Akhil P Oommen <akhilpo@...eaurora.org>
To:     Jonathan Marek <jonathan@...ek.ca>, freedreno@...ts.freedesktop.org
Cc:     Rob Clark <robdclark@...il.com>, Sean Paul <sean@...rly.run>,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>,
        Jordan Crouse <jordan@...micpenguin.net>,
        Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>,
        Dave Airlie <airlied@...hat.com>,
        Sharat Masetty <smasetty@...eaurora.org>,
        "open list:DRM DRIVER FOR MSM ADRENO GPU" 
        <linux-arm-msm@...r.kernel.org>,
        "open list:DRM DRIVER FOR MSM ADRENO GPU" 
        <dri-devel@...ts.freedesktop.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 1/8] drm/msm: remove unused icc_path/ocmem_icc_path

On 5/13/2021 10:43 PM, Jonathan Marek wrote:
> These aren't used by anything anymore.
> 
> Signed-off-by: Jonathan Marek <jonathan@...ek.ca>
> ---
>   drivers/gpu/drm/msm/adreno/adreno_gpu.c | 3 ---
>   drivers/gpu/drm/msm/msm_gpu.h           | 9 ---------
>   2 files changed, 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
> index 8fd0777f2dc9..009f4c560f16 100644
> --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
> @@ -946,7 +946,4 @@ void adreno_gpu_cleanup(struct adreno_gpu *adreno_gpu)
>   	pm_runtime_disable(&priv->gpu_pdev->dev);
>   
>   	msm_gpu_cleanup(&adreno_gpu->base);
> -
> -	icc_put(gpu->icc_path);
> -	icc_put(gpu->ocmem_icc_path);
>   }
> diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
> index 18baf935e143..c302ab7ffb06 100644
> --- a/drivers/gpu/drm/msm/msm_gpu.h
> +++ b/drivers/gpu/drm/msm/msm_gpu.h
> @@ -118,15 +118,6 @@ struct msm_gpu {
>   	struct clk *ebi1_clk, *core_clk, *rbbmtimer_clk;
>   	uint32_t fast_rate;
>   
> -	/* The gfx-mem interconnect path that's used by all GPU types. */
> -	struct icc_path *icc_path;
> -
> -	/*
> -	 * Second interconnect path for some A3xx and all A4xx GPUs to the
> -	 * On Chip MEMory (OCMEM).
> -	 */
> -	struct icc_path *ocmem_icc_path;
> -
>   	/* Hang and Inactivity Detection:
>   	 */
>   #define DRM_MSM_INACTIVE_PERIOD   66 /* in ms (roughly four frames) */
> 
Reviewed-by: Akhil P Oommen <akhilpo@...eaurora.org>

-Akhil.

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