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Message-Id: <20210531125143.257622-5-robert.marko@sartura.hr>
Date: Mon, 31 May 2021 14:51:42 +0200
From: Robert Marko <robert.marko@...tura.hr>
To: lee.jones@...aro.org, linux-kernel@...r.kernel.org,
linus.walleij@...aro.org, bgolaszewski@...libre.com,
linux-gpio@...r.kernel.org, p.zabel@...gutronix.de,
robh+dt@...nel.org, devicetree@...r.kernel.org
Cc: luka.perkov@...tura.hr, jmp@...phyte.org, pmenzel@...gen.mpg.de,
buczek@...gen.mpg.de, Robert Marko <robert.marko@...tura.hr>
Subject: [PATCH v3 5/6] dt-bindings: mfd: Add Delta TN48M CPLD drivers bindings
Add binding documents for the Delta TN48M CPLD drivers.
Signed-off-by: Robert Marko <robert.marko@...tura.hr>
---
Changes in v3:
* Include bindings for reset driver
Changes in v2:
* Implement MFD as a simple I2C MFD
* Add GPIO bindings as separate
.../bindings/gpio/delta,tn48m-gpio.yaml | 42 +++++++++
.../bindings/mfd/delta,tn48m-cpld.yaml | 90 +++++++++++++++++++
.../bindings/reset/delta,tn48m-reset.yaml | 35 ++++++++
3 files changed, 167 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml
create mode 100644 Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml
create mode 100644 Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml
diff --git a/Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml b/Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml
new file mode 100644
index 000000000000..aca646aecb12
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/delta,tn48m-gpio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Delta Networks TN48M CPLD GPIO controller
+
+maintainers:
+ - Robert Marko <robert.marko@...tura.hr>
+
+description: |
+ This module is part of the Delta TN48M multi-function device. For more
+ details see ../mfd/delta,tn48m-cpld.yaml.
+
+ GPIO controller module provides GPIO-s for the SFP slots.
+ It is split into 3 controllers, one output only for the SFP TX disable
+ pins, one input only for the SFP present pins and one input only for
+ the SFP LOS pins.
+
+properties:
+ compatible:
+ enum:
+ - delta,tn48m-gpio-sfp-tx-disable
+ - delta,tn48m-gpio-sfp-present
+ - delta,tn48m-gpio-sfp-los
+
+ reg:
+ maxItems: 1
+
+ "#gpio-cells":
+ const: 2
+
+ gpio-controller: true
+
+required:
+ - compatible
+ - reg
+ - "#gpio-cells"
+ - gpio-controller
+
+additionalProperties: false
diff --git a/Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml b/Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml
new file mode 100644
index 000000000000..2c6e2adf73ca
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml
@@ -0,0 +1,90 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/delta,tn48m-cpld.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Delta Networks TN48M CPLD controller
+
+maintainers:
+ - Robert Marko <robert.marko@...tura.hr>
+
+description: |
+ Lattice CPLD onboard the TN48M switches is used for system
+ management.
+
+ It provides information about the hardware model, revision,
+ PSU status etc.
+
+ It is also being used as a GPIO expander for the SFP slots and
+ reset controller for the switch MAC-s and other peripherals.
+
+properties:
+ compatible:
+ const: delta,tn48m-cpld
+
+ reg:
+ description:
+ I2C device address.
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+required:
+ - compatible
+ - reg
+ - "#address-cells"
+ - "#size-cells"
+
+patternProperties:
+ "^gpio(@[0-9a-f]+)?$":
+ $ref: ../gpio/delta,tn48m-gpio.yaml
+
+ "^reset-controller?$":
+ $ref: ../reset/delta,tn48m-reset.yaml
+
+additionalProperties: false
+
+examples:
+ - |
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpld@41 {
+ compatible = "delta,tn48m-cpld";
+ reg = <0x41>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio@31 {
+ compatible = "delta,tn48m-gpio-sfp-tx-disable";
+ reg = <0x31>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@3a {
+ compatible = "delta,tn48m-gpio-sfp-present";
+ reg = <0x3a>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@40 {
+ compatible = "delta,tn48m-gpio-sfp-los";
+ reg = <0x40>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ reset-controller {
+ compatible = "delta,tn48m-reset";
+ #reset-cells = <1>;
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml b/Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml
new file mode 100644
index 000000000000..0e5ee8decc0d
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/delta,tn48m-reset.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Delta Networks TN48M CPLD reset controller
+
+maintainers:
+ - Robert Marko <robert.marko@...tura.hr>
+
+description: |
+ This module is part of the Delta TN48M multi-function device. For more
+ details see ../mfd/delta,tn48m-cpld.yaml.
+
+ Reset controller modules provides resets for the following:
+ * 88F7040 SoC
+ * 88F6820 SoC
+ * 98DX3265 switch MAC-s
+ * 88E1680 PHY-s
+ * 88E1512 PHY
+ * PoE PSE controller
+
+properties:
+ compatible:
+ const: delta,tn48m-reset
+
+ "#reset-cells":
+ const: 1
+
+required:
+ - compatible
+ - "#reset-cells"
+
+additionalProperties: false
--
2.31.1
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