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Message-ID: <YLR9Vd80yA8+/K9O@vkoul-mobl.Dlink>
Date:   Mon, 31 May 2021 11:38:21 +0530
From:   Vinod Koul <vkoul@...nel.org>
To:     Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc:     kishon@...com, robh+dt@...nel.org, bjorn.andersson@...aro.org,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org
Subject: Re: [PATCH 0/3] Add support for PCIe PHY in SDX55

On 27-04-21, 12:23, Manivannan Sadhasivam wrote:
> Hi,
> 
> This series adds support for PCIe PHY found in Qualcomm SDX55 platform.
> The PHY version is v4.20 which has different register offsets compared with
> previous v4.0x versions. So separate defines are introducted to handle the
> differences.
> 
> This series has been tested on Telit FN980 EVB with an out of tree PCIe Endpoint
> driver.

Applied, thanks

I got a conflict on last patch as Dimitry has already added some defines
in the header.. Pls check everything was applied cleanly

Thanks
-- 
~Vinod

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