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Message-ID: <20210601112820.GA189305@rocinante.localdomain>
Date:   Tue, 1 Jun 2021 13:28:20 +0200
From:   Krzysztof Wilczyński <kw@...ux.com>
To:     Pali Rohár <pali@...nel.org>
Cc:     Bjorn Helgaas <bhelgaas@...gle.com>,
        Kalle Valo <kvalo@...eaurora.org>,
        Toke Høiland-Jørgensen <toke@...hat.com>,
        Marek Behún <kabel@...nel.org>,
        vtolkm@...il.com, Rob Herring <robh@...nel.org>,
        Ilias Apalodimas <ilias.apalodimas@...aro.org>,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        linux-pci@...r.kernel.org, ath10k@...ts.infradead.org,
        linux-wireless@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3] PCI: Disallow retraining link for Atheros chips on
 non-Gen1 PCIe bridges

Hi Pali,

Thank you for working on this and fixing the problem, and also thank you
goes to Marek and Toke for testing!  Much appreciated!

[...]
> - AR9287 chip throws also Link Down and Link Up events, also has
>   accessible config space containing correct values. But ath9k driver
>   fails to initialize card from this state as it is unable to access HW
>   registers. This also indicates that the chip iself is not able to read

A typo here - it would be "itself" in the above.  But this is not worth
sending v4, and I am sure that Bjorn or Lorenzo could fix this in-place
when merging.

[...]
> Signed-off-by: Pali Rohár <pali@...nel.org>
> Reported-by: Toke Høiland-Jørgensen <toke@...hat.com>
> Tested-by: Toke Høiland-Jørgensen <toke@...hat.com>
> Tested-by: Marek Behún <kabel@...nel.org>
[...]

Thank you everyone!

Reviewed-by: Krzysztof Wilczyński <kw@...ux.com>

	Krzysztof

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