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Date:   Tue, 1 Jun 2021 09:57:54 -0700
From:   Doug Anderson <dianders@...omium.org>
To:     Bjorn Andersson <bjorn.andersson@...aro.org>
Cc:     Wenchao Han <hanwenchao@...qin.corp-partner.google.com>,
        Andy Gross <agross@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        linux-arm-msm <linux-arm-msm@...r.kernel.org>,
        LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] arm64: dts: qcom: sc7180: Modify SPI_CLK voltage level
 for trogdor

Bjorn,

On Mon, May 10, 2021 at 7:53 AM Douglas Anderson <dianders@...omium.org> wrote:
>
> From: Wenchao Han <hanwenchao@...qin.corp-partner.google.com>
>
> On coachz it could be observed that SPI_CLK voltage level was only
> 1.4V during active transfers because the drive strength was too
> weak. The line hadn't finished slewing up by the time we started
> driving it down again. Using a drive strength of 8 lets us achieve the
> correct voltage level of 1.8V.
>
> Though the worst problems were observed on coachz hardware, let's do
> this across the board for trogdor devices. Scoping other boards shows
> that this makes the clk line look nicer on them too and doesn't
> introduce any problems.
>
> Only the clk line is adjusted, not any data lines. Because SPI isn't a
> DDR protocol we only sample the data lines on either rising or falling
> edges, not both. That means the clk line needs to toggle twice as fast
> as data lines so having the higher drive strength is more important
> there.
>
> Signed-off-by: Wenchao Han <hanwenchao@...qin.corp-partner.google.com>
> [dianders: Adjust author real name; adjust commit message]
> Signed-off-by: Douglas Anderson <dianders@...omium.org>
> ---
>
>  arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 1 +
>  1 file changed, 1 insertion(+)

I think this patch is ready to land and it's what we're now using in
the Chrome OS tree. See <https://crrev.com/c/2821728>.

-Doug

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