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Message-Id: <1622621468-17013-1-git-send-email-p.cardoen@televic.com>
Date: Wed, 2 Jun 2021 10:11:07 +0200
From: Pieter Cardoen <p.cardoen@...evic.com>
To: unlisted-recipients:; (no To-header on input)
Cc: Pieter Cardoen <p.cardoen@...evic.com>,
Rob Herring <robh+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
Russell King <linux@...linux.org.uk>,
Robert Karszniewicz <r.karszniewicz@...tec.de>,
Oleksij Rempel <linux@...pel-privat.de>,
Stefan Riedmueller <s.riedmueller@...tec.de>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH] ARM: imx: mach-imx6ul: added gpr enet<x>-tx-clock config
Allow enable/disable of IMX6UL_GPR1_ENET1_CLK_OUTPUT and
IMX6UL_GPR2_ENET_CLK_OUTPUT as it may not be enabled when
using a phy in RMII mode. Enabling this clock output in
RMII mode results in multiple drivers on a single line.
Configuration can be done using gpr device-tree handle by
including string options enet1-tx-clock and enet2-tx-clock.
Signed-off-by: Pieter Cardoen <p.cardoen@...evic.com>
---
arch/arm/boot/dts/imx6ul.dtsi | 1 +
arch/arm/mach-imx/mach-imx6ul.c | 15 ++++++++++++++-
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 7901494..f4dbde8 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -737,6 +737,7 @@
compatible = "fsl,imx6ul-iomuxc-gpr",
"fsl,imx6q-iomuxc-gpr", "syscon";
reg = <0x020e4000 0x4000>;
+ enet1-tx-clock = "enable";
};
gpt2: timer@...8000 {
diff --git a/arch/arm/mach-imx/mach-imx6ul.c b/arch/arm/mach-imx/mach-imx6ul.c
index 35e8120..ea2fae8 100644
--- a/arch/arm/mach-imx/mach-imx6ul.c
+++ b/arch/arm/mach-imx/mach-imx6ul.c
@@ -19,11 +19,24 @@
static void __init imx6ul_enet_clk_init(void)
{
struct regmap *gpr;
+ unsigned int enet_clk_output = 0;
+ struct device_node *node = of_find_compatible_node(NULL, NULL, "fsl,imx6ul-iomuxc-gpr");
+ const char *enable;
+
+ if (node) {
+ if (!of_property_read_string(node, "enet1-tx-clock", &enable))
+ if (strcmp(enable, "enable") == 0)
+ enet_clk_output |= IMX6UL_GPR1_ENET_CLK_OUTPUT;
+
+ if (!of_property_read_string(node, "enet2-tx-clock", &enable))
+ if (strcmp(enable, "enable") == 0)
+ enet_clk_output |= IMX6UL_GPR1_ENET2_CLK_OUTPUT;
+ }
gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr");
if (!IS_ERR(gpr))
regmap_update_bits(gpr, IOMUXC_GPR1, IMX6UL_GPR1_ENET_CLK_DIR,
- IMX6UL_GPR1_ENET_CLK_OUTPUT);
+ enet_clk_output);
else
pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n");
}
--
2.7.4
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