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Message-ID: <20210602015151.4135891-1-zhengyongjun3@huawei.com>
Date: Wed, 2 Jun 2021 09:51:51 +0800
From: Zheng Yongjun <zhengyongjun3@...wei.com>
To: <andrew@...n.ch>, <hkallweit1@...il.com>, <davem@...emloft.net>,
<kuba@...nel.org>, <rjui@...adcom.com>, <sbranden@...adcom.com>,
<bcm-kernel-feedback-list@...adcom.com>, <narmstrong@...libre.com>,
<khilman@...libre.com>, <netdev@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-amlogic@...ts.infradead.org>
CC: <opendmb@...il.com>, <f.fainelli@...il.com>,
<linux@...linux.org.uk>, <jbrunet@...libre.com>,
<martin.blumenstingl@...glemail.com>,
Zheng Yongjun <zhengyongjun3@...wei.com>
Subject: [PATCH v2 net-next] net: mdio: Fix spelling mistakes
informations ==> information
typicaly ==> typically
derrive ==> derive
eventhough ==> even though
hz ==> Hz
Signed-off-by: Zheng Yongjun <zhengyongjun3@...wei.com>
---
drivers/net/mdio/mdio-bcm-unimac.c | 2 +-
drivers/net/mdio/mdio-mux-bcm-iproc.c | 2 +-
drivers/net/mdio/mdio-mux-meson-g12a.c | 2 +-
drivers/net/mdio/of_mdio.c | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/mdio/mdio-bcm-unimac.c b/drivers/net/mdio/mdio-bcm-unimac.c
index 5d171e7f118d..63348716b426 100644
--- a/drivers/net/mdio/mdio-bcm-unimac.c
+++ b/drivers/net/mdio/mdio-bcm-unimac.c
@@ -203,7 +203,7 @@ static void unimac_mdio_clk_set(struct unimac_mdio_priv *priv)
return;
}
- /* The MDIO clock is the reference clock (typicaly 250Mhz) divided by
+ /* The MDIO clock is the reference clock (typically 250MHz) divided by
* 2 x (MDIO_CLK_DIV + 1)
*/
reg = unimac_mdio_readl(priv, MDIO_CFG);
diff --git a/drivers/net/mdio/mdio-mux-bcm-iproc.c b/drivers/net/mdio/mdio-mux-bcm-iproc.c
index 03261e6b9ceb..239e88c7a272 100644
--- a/drivers/net/mdio/mdio-mux-bcm-iproc.c
+++ b/drivers/net/mdio/mdio-mux-bcm-iproc.c
@@ -65,7 +65,7 @@ static void mdio_mux_iproc_config(struct iproc_mdiomux_desc *md)
writel(val, md->base + MDIO_SCAN_CTRL_OFFSET);
if (md->core_clk) {
- /* use rate adjust regs to derrive the mdio's operating
+ /* use rate adjust regs to derive the mdio's operating
* frequency from the specified core clock
*/
divisor = clk_get_rate(md->core_clk) / MDIO_OPERATING_FREQUENCY;
diff --git a/drivers/net/mdio/mdio-mux-meson-g12a.c b/drivers/net/mdio/mdio-mux-meson-g12a.c
index bf86c9c7a288..b8866bc3f2e8 100644
--- a/drivers/net/mdio/mdio-mux-meson-g12a.c
+++ b/drivers/net/mdio/mdio-mux-meson-g12a.c
@@ -95,7 +95,7 @@ static int g12a_ephy_pll_enable(struct clk_hw *hw)
/* Poll on the digital lock instead of the usual analog lock
* This is done because bit 31 is unreliable on some SoC. Bit
- * 31 may indicate that the PLL is not lock eventhough the clock
+ * 31 may indicate that the PLL is not lock even though the clock
* is actually running
*/
return readl_poll_timeout(pll->base + ETH_PLL_CTL0, val,
diff --git a/drivers/net/mdio/of_mdio.c b/drivers/net/mdio/of_mdio.c
index 094494a68ddf..8e97d5b825f5 100644
--- a/drivers/net/mdio/of_mdio.c
+++ b/drivers/net/mdio/of_mdio.c
@@ -466,7 +466,7 @@ EXPORT_SYMBOL(of_phy_get_and_connect);
* of_phy_is_fixed_link() and of_phy_register_fixed_link() must
* support two DT bindings:
* - the old DT binding, where 'fixed-link' was a property with 5
- * cells encoding various informations about the fixed PHY
+ * cells encoding various information about the fixed PHY
* - the new DT binding, where 'fixed-link' is a sub-node of the
* Ethernet device.
*/
--
2.25.1
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