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Message-ID: <YLdra2JOW+/peGch@ryzen.lan>
Date: Wed, 2 Jun 2021 14:28:43 +0300
From: Abel Vesa <abel.vesa@....com>
To: Dong Aisheng <dongas86@...il.com>
Cc: Abel Vesa <abelvesa@...nel.org>, Rob Herring <robh@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
Jacky Bai <ping.bai@....com>,
Dong Aisheng <aisheng.dong@....com>,
NXP Linux Team <linux-imx@....com>,
devicetree <devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
Clark Wang <xiaoning.wang@....com>
Subject: Re: [PATCH 3/7] arm64: dts: freescale: Add adma subsystem dtsi for
imx8dxl
On 21-05-18 15:52:00, Dong Aisheng wrote:
> On Tue, May 18, 2021 at 1:15 AM <abelvesa@...nel.org> wrote:
> >
> > From: Abel Vesa <abel.vesa@....com>
> >
> > Override the I2Cs, LPUARTs, audio_ipg_clk and dma_ipg_clk with
> > the i.MX8DXL specific properties.
> >
> > Signed-off-by: Clark Wang <xiaoning.wang@....com>
> > Signed-off-by: Jacky Bai <ping.bai@....com>
> > Signed-off-by: Abel Vesa <abel.vesa@....com>
>
> Please add dt-binding update as well.
> Better along with this patch series
>
Will do in the next version.
> > ---
> > .../boot/dts/freescale/imx8dxl-ss-adma.dtsi | 53 +++++++++++++++++++
> > 1 file changed, 53 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi
> > new file mode 100644
> > index 000000000000..12ccbc6587ca
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi
> > @@ -0,0 +1,53 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright 2019-2021 NXP
> > + */
> > +
> > +&audio_ipg_clk {
> > + clock-frequency = <160000000>;
> > +};
> > +
> > +&dma_ipg_clk {
> > + clock-frequency = <160000000>;
> > +};
> > +
> > +&i2c0 {
> > + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
> > + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&i2c1 {
> > + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
> > + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&i2c2 {
> > + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
> > + interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&i2c3 {
> > + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
> > + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&lpuart0 {
> > + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
> > + interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&lpuart1 {
> > + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
> > + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&lpuart2 {
> > + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
> > + interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&lpuart3 {
> > + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
> > + interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > --
> > 2.31.1
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel@...ts.infradead.org
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