linux-kernel - [PATCH 6/8] ARM: dts: wpcm450: Add pinctrl node

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Message-Id: <20210602120329.2444672-7-j.neuschaefer@gmx.net>
Date:   Wed,  2 Jun 2021 14:03:27 +0200
From:   Jonathan Neuschäfer <j.neuschaefer@....net>
To:     linux-gpio@...r.kernel.org, devicetree@...r.kernel.org
Cc:     Linus Walleij <linus.walleij@...aro.org>,
        Rob Herring <robh+dt@...nel.org>, openbmc@...ts.ozlabs.org,
        Tomer Maimon <tmaimon77@...il.com>,
        Joel Stanley <joel@....id.au>, linux-kernel@...r.kernel.org,
        Jonathan Neuschäfer <j.neuschaefer@....net>
Subject: [PATCH 6/8] ARM: dts: wpcm450: Add pinctrl node

This patch adds the GPIO and pin controller to the devicetree for the
WPCM450 SoC.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@....net>
---
 arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
index 8eba4897b41bc..1b63943b2a42b 100644
--- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
+++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
@@ -77,5 +77,16 @@ aic: interrupt-controller@...02000 {
 			interrupt-controller;
 			#interrupt-cells = <2>;
 		};
+
+		pinctrl: pinctrl@...03000 {
+			compatible = "nuvoton,wpcm450-pinctrl";
+			reg = <0xb8003000 0x1000>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupts = <2 IRQ_TYPE_LEVEL_HIGH
+				      3 IRQ_TYPE_LEVEL_HIGH
+				      4 IRQ_TYPE_LEVEL_HIGH
+				      5 IRQ_TYPE_LEVEL_HIGH>;
+		};
 	};
 };
--
2.30.2