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Message-Id: <fcd435d9-4432-414e-9881-6044757a6fac@www.fastmail.com>
Date: Fri, 04 Jun 2021 08:59:55 +0930
From: "Andrew Jeffery" <andrew@...id.au>
To: "Steven Lee" <steven_lee@...eedtech.com>,
"Linus Walleij" <linus.walleij@...aro.org>,
"Bartosz Golaszewski" <bgolaszewski@...libre.com>,
"Rob Herring" <robh+dt@...nel.org>,
"Joel Stanley" <joel@....id.au>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-arm-kernel@...ts.infradead.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-aspeed@...ts.ozlabs.org>,
"open list" <linux-kernel@...r.kernel.org>
Cc: "Hongwei Zhang" <Hongweiz@....com>,
"Ryan Chen" <ryan_chen@...eedtech.com>,
"Billy Tsai" <billy_tsai@...eedtech.com>
Subject: Re: [PATCH v3 2/5] ARM: dts: aspeed-g6: Add SGPIO node.
On Thu, 3 Jun 2021, at 19:48, Steven Lee wrote:
> AST2600 supports 2 SGPIO master interfaces one with 128 pins another one
> with 80 pins.
>
> Signed-off-by: Steven Lee <steven_lee@...eedtech.com>
> ---
> arch/arm/boot/dts/aspeed-g6.dtsi | 30 ++++++++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
> index f96607b7b4e2..e56e92e206f1 100644
> --- a/arch/arm/boot/dts/aspeed-g6.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g6.dtsi
> @@ -377,6 +377,36 @@
> #interrupt-cells = <2>;
> };
>
> + sgpiom0: sgpiom@...80500 {
> + #gpio-cells = <2>;
> + gpio-controller;
> + compatible = "aspeed,ast2600-sgpiom1";
See my comment on the compatible names on the binding document.
Andrew
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