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Message-Id: <20210603103814.95177-1-manivannan.sadhasivam@linaro.org>
Date: Thu, 3 Jun 2021 16:08:11 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: lorenzo.pieralisi@....com, robh@...nel.org, bhelgaas@...gle.com
Cc: bjorn.andersson@...aro.org, linux-arm-msm@...r.kernel.org,
linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Subject: [PATCH v2 0/3] Add Qualcomm PCIe Endpoint driver support
Hello,
This series adds support for Qualcomm PCIe Endpoint controller found
in platforms like SDX55. The Endpoint controller is based on the designware
core with additional Qualcomm wrappers around the core.
The driver is added separately unlike other Designware based drivers that
combine RC and EP in a single driver. This is done to avoid complexity and
to maintain this driver autonomously.
The driver has been validated with an out of tree MHI function driver on
SDX55 based Telit FN980 EVB connected to x86 host machine over PCIe.
Thanks,
Mani
Changes in v2:
* Addressed the comments from Rob on bindings patch
* Modified the driver as per binding change
* Fixed the warnings reported by Kbuild bot
* Removed the PERST# "enable_irq" call from probe()
Manivannan Sadhasivam (3):
dt-bindings: pci: Add devicetree binding for Qualcomm PCIe EP
controller
PCI: dwc: Add Qualcomm PCIe Endpoint controller driver
MAINTAINERS: Add entry for Qualcomm PCIe Endpoint driver and binding
.../devicetree/bindings/pci/qcom,pcie-ep.yaml | 144 ++++
MAINTAINERS | 10 +-
drivers/pci/controller/dwc/Kconfig | 10 +
drivers/pci/controller/dwc/Makefile | 1 +
drivers/pci/controller/dwc/pcie-qcom-ep.c | 780 ++++++++++++++++++
5 files changed, 944 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
create mode 100644 drivers/pci/controller/dwc/pcie-qcom-ep.c
--
2.25.1
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