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Message-ID: <20210603115642.GC4257@sirena.org.uk>
Date:   Thu, 3 Jun 2021 12:56:42 +0100
From:   Mark Brown <broonie@...nel.org>
To:     patrice.chotard@...s.st.com
Cc:     Alexandre Torgue <alexandre.torgue@...s.st.com>,
        linux-spi@...r.kernel.org,
        linux-stm32@...md-mailman.stormreply.com,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        christophe.kerello@...s.st.com
Subject: Re: spi: stm32-qspi: Always wait BUSY bit to be cleared in
 stm32_qspi_wait_cmd()

On Thu, Jun 03, 2021 at 09:34:21AM +0200, patrice.chotard@...s.st.com wrote:
> From: Patrice Chotard <patrice.chotard@...s.st.com>
> 
> In U-boot side, an issue has been encountered when QSPI source clock is
> running at low frequency (24 MHz for example), waiting for TCF bit to be
> set didn't ensure that all data has been send out the FIFO, we should also
> wait that BUSY bit is cleared.

Please remember to put the [PATCH] in your subject.

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