linux-kernel - Re: [PATCH 2/2] KVM: LAPIC: reset TMCCT during vCPU reset

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Message-ID: <CALMp9eSK-_xOp=WdRbOOHaHHMHuJkPhG+7h4M+_+=4d-GCNzwA@mail.gmail.com>
Date:   Thu, 3 Jun 2021 05:27:46 -0700
From:   Jim Mattson <jmattson@...gle.com>
To:     Wanpeng Li <kernellwp@...il.com>
Cc:     LKML <linux-kernel@...r.kernel.org>,
        kvm list <kvm@...r.kernel.org>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Sean Christopherson <seanjc@...gle.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Joerg Roedel <joro@...tes.org>
Subject: Re: [PATCH 2/2] KVM: LAPIC: reset TMCCT during vCPU reset

On Thu, Jun 3, 2021 at 2:01 AM Wanpeng Li <kernellwp@...il.com> wrote:
>
> From: Wanpeng Li <wanpengli@...cent.com>
>
> The value of current counter register after reset is 0 for both Intel
> and AMD, let's do it in kvm.
>
> Signed-off-by: Wanpeng Li <wanpengli@...cent.com>

How did we miss that?

Reviewed-by: Jim Mattson <jmattson@...gle.com>