lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <56f3b0bd-5dd7-80d4-041a-0fd2daf4b1f2@marek.ca>
Date:   Fri, 4 Jun 2021 13:25:41 -0400
From:   Jonathan Marek <jonathan@...ek.ca>
To:     Stephen Boyd <sboyd@...nel.org>, linux-arm-msm@...r.kernel.org
Cc:     Rob Herring <robh@...nel.org>, Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Michael Turquette <mturquette@...libre.com>,
        Rob Herring <robh+dt@...nel.org>, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/2] dt-bindings: clock: add QCOM SM8350 display clock
 bindings

On 6/2/21 5:27 PM, Stephen Boyd wrote:
> Quoting Jonathan Marek (2021-05-18 17:18:02)
>> Add sm8350 DISPCC bindings, which are simply a symlink to the sm8250
>> bindings. Update the documentation with the new compatible.
>>
>> Signed-off-by: Jonathan Marek <jonathan@...ek.ca>
>> Reviewed-by: Rob Herring <robh@...nel.org>
>> ---
>>   .../devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml       | 6 ++++--
>>   include/dt-bindings/clock/qcom,dispcc-sm8350.h              | 1 +
> 
>>   2 files changed, 5 insertions(+), 2 deletions(-)
>>   create mode 120000 include/dt-bindings/clock/qcom,dispcc-sm8350.h
> 
> Why the symlink? Can we have the dt authors use the existing header file
> instead?
> 

It would be strange to include bindings with the name of a different 
SoC. I guess it is a matter a preference, is there any good reason to 
*not* do it like this?

>>
>> diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
>> index 0cdf53f41f84..8f414642445e 100644
>> --- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
>> +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
>> @@ -4,24 +4,26 @@
>>   $id: http://devicetree.org/schemas/clock/qcom,dispcc-sm8x50.yaml#
>>   $schema: http://devicetree.org/meta-schemas/core.yaml#
>>   
>> -title: Qualcomm Display Clock & Reset Controller Binding for SM8150/SM8250
>> +title: Qualcomm Display Clock & Reset Controller Binding for SM8150/SM8250/SM8350
> 
> Maybe just "Binding for SM8x50 SoCs"
> 

Its likely these bindings won't be compatible with future "SM8x50" SoCs, 
listing supported SoCs explicitly will avoid confusion in the future.

>>   
>>   maintainers:
>>     - Jonathan Marek <jonathan@...ek.ca>
>>   
>>   description: |
>>     Qualcomm display clock control module which supports the clocks, resets and
>> -  power domains on SM8150 and SM8250.
>> +  power domains on SM8150/SM8250/SM8350.
> 
> same 8x50 comment.
> 
>>   
>>     See also:
>>       dt-bindings/clock/qcom,dispcc-sm8150.h
>>       dt-bindings/clock/qcom,dispcc-sm8250.h
>> +    dt-bindings/clock/qcom,dispcc-sm8350.h
>>   
>>   properties:
>>     compatible:
>>       enum:
>>         - qcom,sm8150-dispcc
>>         - qcom,sm8250-dispcc
>> +      - qcom,sm8350-dispcc
>>   
>>     clocks:
>>       items:
>> diff --git a/include/dt-bindings/clock/qcom,dispcc-sm8350.h b/include/dt-bindings/clock/qcom,dispcc-sm8350.h
>> new file mode 120000
>> index 000000000000..0312b4544acb
>> --- /dev/null
>> +++ b/include/dt-bindings/clock/qcom,dispcc-sm8350.h
>> @@ -0,0 +1 @@
>> +qcom,dispcc-sm8250.h
>> \ No newline at end of file

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ