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Message-ID: <CAH=2NtwzFMre_+6LRM_JL+itbG09UuKLtH+Awbv_zK++qns49w@mail.gmail.com>
Date: Fri, 4 Jun 2021 08:57:27 +0530
From: Bhupesh Sharma <bhupesh.sharma@...aro.org>
To: Rob Herring <robh@...nel.org>
Cc: linux-arm-msm@...r.kernel.org,
Thara Gopinath <thara.gopinath@...aro.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Andy Gross <agross@...nel.org>,
Herbert Xu <herbert@...dor.apana.org.au>,
"David S . Miller" <davem@...emloft.net>,
Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Vinod Koul <vkoul@...nel.org>, dmaengine@...r.kernel.org,
linux-clk@...r.kernel.org, linux-crypto@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
bhupesh.linux@...il.com
Subject: Re: [PATCH v3 01/17] dt-bindings: qcom-bam: Convert binding to YAML
Hello Rob,
Thanks for the review and sorry for the late reply.
On Fri, 21 May 2021 at 07:13, Rob Herring <robh@...nel.org> wrote:
>
> On Wed, May 19, 2021 at 08:06:44PM +0530, Bhupesh Sharma wrote:
> > Convert Qualcomm BAM DMA devicetree binding to YAML.
> >
> > Cc: Thara Gopinath <thara.gopinath@...aro.org>
> > Cc: Bjorn Andersson <bjorn.andersson@...aro.org>
> > Cc: Rob Herring <robh+dt@...nel.org>
> > Cc: Andy Gross <agross@...nel.org>
> > Cc: Herbert Xu <herbert@...dor.apana.org.au>
> > Cc: David S. Miller <davem@...emloft.net>
> > Cc: Stephen Boyd <sboyd@...nel.org>
> > Cc: Michael Turquette <mturquette@...libre.com>
> > Cc: Vinod Koul <vkoul@...nel.org>
> > Cc: dmaengine@...r.kernel.org
> > Cc: linux-clk@...r.kernel.org
> > Cc: linux-crypto@...r.kernel.org
> > Cc: devicetree@...r.kernel.org
> > Cc: linux-kernel@...r.kernel.org
> > Cc: bhupesh.linux@...il.com
> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...aro.org>
> > ---
> > .../devicetree/bindings/dma/qcom_bam_dma.txt | 50 ----------
> > .../devicetree/bindings/dma/qcom_bam_dma.yaml | 91 +++++++++++++++++++
> > 2 files changed, 91 insertions(+), 50 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/dma/qcom_bam_dma.txt
> > create mode 100644 Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt b/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt
> > deleted file mode 100644
> > index cf5b9e44432c..000000000000
> > --- a/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt
> > +++ /dev/null
> > @@ -1,50 +0,0 @@
> > -QCOM BAM DMA controller
> > -
> > -Required properties:
> > -- compatible: must be one of the following:
> > - * "qcom,bam-v1.4.0" for MSM8974, APQ8074 and APQ8084
> > - * "qcom,bam-v1.3.0" for APQ8064, IPQ8064 and MSM8960
> > - * "qcom,bam-v1.7.0" for MSM8916
> > -- reg: Address range for DMA registers
> > -- interrupts: Should contain the one interrupt shared by all channels
> > -- #dma-cells: must be <1>, the cell in the dmas property of the client device
> > - represents the channel number
> > -- clocks: required clock
> > -- clock-names: must contain "bam_clk" entry
> > -- qcom,ee : indicates the active Execution Environment identifier (0-7) used in
> > - the secure world.
> > -- qcom,controlled-remotely : optional, indicates that the bam is controlled by
> > - remote proccessor i.e. execution environment.
> > -- num-channels : optional, indicates supported number of DMA channels in a
> > - remotely controlled bam.
> > -- qcom,num-ees : optional, indicates supported number of Execution Environments
> > - in a remotely controlled bam.
> > -
> > -Example:
> > -
> > - uart-bam: dma@...84000 = {
> > - compatible = "qcom,bam-v1.4.0";
> > - reg = <0xf9984000 0x15000>;
> > - interrupts = <0 94 0>;
> > - clocks = <&gcc GCC_BAM_DMA_AHB_CLK>;
> > - clock-names = "bam_clk";
> > - #dma-cells = <1>;
> > - qcom,ee = <0>;
> > - };
> > -
> > -DMA clients must use the format described in the dma.txt file, using a two cell
> > -specifier for each channel.
> > -
> > -Example:
> > - serial@...1e000 {
> > - compatible = "qcom,msm-uart";
> > - reg = <0xf991e000 0x1000>
> > - <0xf9944000 0x19000>;
> > - interrupts = <0 108 0>;
> > - clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
> > - <&gcc GCC_BLSP1_AHB_CLK>;
> > - clock-names = "core", "iface";
> > -
> > - dmas = <&uart-bam 0>, <&uart-bam 1>;
> > - dma-names = "rx", "tx";
> > - };
> > diff --git a/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml b/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml
> > new file mode 100644
> > index 000000000000..173e4d7508a6
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml
> > @@ -0,0 +1,91 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/dma/qcom_bam_dma.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: QCOM BAM DMA controller binding
> > +
> > +maintainers:
> > + - Bhupesh Sharma <bhupesh.sharma@...aro.org>
> > +
> > +description: |
> > + This document defines the binding for the BAM DMA controller
> > + found on Qualcomm parts.
> > +
> > +allOf:
> > + - $ref: "dma-controller.yaml#"
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - qcom,bam-v1.4.0
> > + - qcom,bam-v1.3.0
> > + - qcom,bam-v1.7.0
>
> Can we keep the SoC association please.
The original bam dma bindings are as per the underlying bam IP
version, so I would prefer that we keep it this way for this series.
Later on I can send a patchset to convert the bam DMA dt-bindings, dts
and driver to work with 'SoC association' instead.
> > +
> > + reg:
> > + maxItems: 1
> > + description: Address range of the DMA registers.
>
> Drop description.
Sure.
> > +
> > + clocks:
> > + minItems: 1
> > + maxItems: 8
> > +
> > + clock-names:
> > + const: bam_clk
>
> This is going to fail if you try more than 1 clock.
Right, currently we have one clock, but I can recheck and make fixes in v4.
> > +
> > + interrupts:
> > + maxItems: 1
> > + description: Single interrupt line shared by all channels.
>
> Drop description
Ok.
> > +
> > + num-channels:
> > + maxItems: 31
> > + description: |
> > + Indicates supported number of DMA channels in a remotely controlled bam.
> > +
> > + "#dma-cells":
> > + const: 1
> > + description: The single cell represents the channel index.
> > +
> > + qcom,ee:
> > + $ref: /schemas/types.yaml#/definitions/uint8
> > + description:
> > + Indicates the active Execution Environment identifier (0-7)
> > + used in the secure world.
> > + enum: [0, 1, 2, 3, 4, 5, 6, 7]
> > +
> > + qcom,controlled-remotely:
> > + $ref: /schemas/types.yaml#/definitions/flag
> > + description:
> > + Indicates that the bam is controlled by remote proccessor i.e.
> > + execution environment.
> > +
> > + qcom,num-ees:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + description:
> > + Indicates supported number of Execution Environments in a
> > + remotely controlled bam.
>
> 0-2^32 is valid?
Oh, got it. Will fix it in v4.
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - interrupts
> > + - clocks
> > + - clock-names
> > + - "#dma-cells"
> > + - qcom,ee
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/qcom,gcc-msm8974.h>
> > + dma-controller@...84000 {
> > + compatible = "qcom,bam-v1.4.0";
> > + reg = <0xf9984000 0x15000>;
> > + interrupts = <0 94 0>;
> > + clocks = <&gcc GCC_BAM_DMA_AHB_CLK>;
> > + clock-names = "bam_clk";
> > + #dma-cells = <1>;
> > + qcom,ee = /bits/ 8 <0>;
> > + };
> > --
> > 2.31.1
Thanks,
Bhupesh
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