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Message-Id: <20210604032957.224496-1-xieqinick@gmail.com>
Date: Fri, 4 Jun 2021 11:29:57 +0800
From: xieqinick@...il.com
To: narmstrong@...libre.com, jbrunet@...libre.com,
mturquette@...libre.com, sboyd@...nel.org, khilman@...libre.com,
martin.blumenstingl@...glemail.com,
linux-amlogic@...ts.infradead.org, linux-clk@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Cc: nick@...das.com, artem@...das.com
Subject: [PATCH] clk: meson: g12a: Add missing NNA source clocks for g12b
From: Nick Xie <nick@...das.com>
This adds the Neural Network Accelerator source clocks for g12b.
Initial support for sm1 already exist in
commit 2f1efa5340ef
("clk: meson: g12a: Add support for NNA CLK source clocks")
The sm1 and g12b share the same NNA source clocks.
This patch add missing NNA clocks for A311D (g12b).
Signed-off-by: Nick Xie <nick@...das.com>
---
drivers/clk/meson/g12a.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index b080359b4645..6a1db16b126f 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -4723,6 +4723,12 @@ static struct clk_hw_onecell_data g12b_hw_onecell_data = {
[CLKID_SPICC1_SCLK_SEL] = &g12a_spicc1_sclk_sel.hw,
[CLKID_SPICC1_SCLK_DIV] = &g12a_spicc1_sclk_div.hw,
[CLKID_SPICC1_SCLK] = &g12a_spicc1_sclk.hw,
+ [CLKID_NNA_AXI_CLK_SEL] = &sm1_nna_axi_clk_sel.hw,
+ [CLKID_NNA_AXI_CLK_DIV] = &sm1_nna_axi_clk_div.hw,
+ [CLKID_NNA_AXI_CLK] = &sm1_nna_axi_clk.hw,
+ [CLKID_NNA_CORE_CLK_SEL] = &sm1_nna_core_clk_sel.hw,
+ [CLKID_NNA_CORE_CLK_DIV] = &sm1_nna_core_clk_div.hw,
+ [CLKID_NNA_CORE_CLK] = &sm1_nna_core_clk.hw,
[CLKID_MIPI_DSI_PXCLK_SEL] = &g12a_mipi_dsi_pxclk_sel.hw,
[CLKID_MIPI_DSI_PXCLK_DIV] = &g12a_mipi_dsi_pxclk_div.hw,
[CLKID_MIPI_DSI_PXCLK] = &g12a_mipi_dsi_pxclk.hw,
--
2.25.1
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