linux-kernel - RE: [PATCH v3 2/2] clocksource: Add Intel Keem Bay timer support

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Message-ID: <BYAPR11MB312880A1CAF52DE4C3B690D9F13B9@BYAPR11MB3128.namprd11.prod.outlook.com>
Date:   Fri, 4 Jun 2021 09:19:58 +0000
From:   "Sanil, Shruthi" <shruthi.sanil@...el.com>
To:     Daniel Lezcano <daniel.lezcano@...aro.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
CC:     "andriy.shevchenko@...ux.intel.com" 
        <andriy.shevchenko@...ux.intel.com>,
        "kris.pan@...ux.intel.com" <kris.pan@...ux.intel.com>,
        "mgross@...ux.intel.com" <mgross@...ux.intel.com>,
        "Thokala, Srikanth" <srikanth.thokala@...el.com>,
        "Raja Subramanian, Lakshmi Bai" 
        <lakshmi.bai.raja.subramanian@...el.com>,
        "Sangannavar, Mallikarjunappa" 
        <mallikarjunappa.sangannavar@...el.com>
Subject: RE: [PATCH v3 2/2] clocksource: Add Intel Keem Bay timer support

Hi Daniel,

> -----Original Message-----
> From: Daniel Lezcano <daniel.lezcano@...aro.org>
> Sent: Friday, June 4, 2021 1:37 PM
> To: Sanil, Shruthi <shruthi.sanil@...el.com>; tglx@...utronix.de;
> robh+dt@...nel.org; linux-kernel@...r.kernel.org;
> devicetree@...r.kernel.org
> Cc: andriy.shevchenko@...ux.intel.com; kris.pan@...ux.intel.com;
> mgross@...ux.intel.com; Thokala, Srikanth <srikanth.thokala@...el.com>;
> Raja Subramanian, Lakshmi Bai <lakshmi.bai.raja.subramanian@...el.com>;
> Sangannavar, Mallikarjunappa <mallikarjunappa.sangannavar@...el.com>
> Subject: Re: [PATCH v3 2/2] clocksource: Add Intel Keem Bay timer support
> 
> On 27/05/2021 08:39, shruthi.sanil@...el.com wrote:
> > From: Shruthi Sanil <shruthi.sanil@...el.com>
> >
> > The Intel Keem Bay timer driver supports clocksource and clockevent
> > features for the timer IP used in Intel Keem Bay SoC.
> > The timer block supports 1 free running counter and 8 timers.
> > The free running counter can be used as a clocksource and the timers
> > can be used as clockevent. Each timer is capable of generating
> > individual interrupt.
> > Both the features are enabled through the timer general config register.
> >
> > Reviewed-by: Andy Shevchenko <andriy.shevchenko@...el.com>
> > Signed-off-by: Shruthi Sanil <shruthi.sanil@...el.com>
> > ---
> >  MAINTAINERS                         |   5 +
> >  drivers/clocksource/Kconfig         |  11 ++
> >  drivers/clocksource/Makefile        |   1 +
> >  drivers/clocksource/timer-keembay.c | 255
> > ++++++++++++++++++++++++++++
> >  4 files changed, 272 insertions(+)
> >  create mode 100644 drivers/clocksource/timer-keembay.c
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS index
> > 04babfa8fc76..73543ed60e84 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -9278,6 +9278,11 @@ F:	drivers/crypto/keembay/keembay-ocs-hcu-
> core.c
> >  F:	drivers/crypto/keembay/ocs-hcu.c
> >  F:	drivers/crypto/keembay/ocs-hcu.h
> >
> > +INTEL KEEM BAY TIMER SUPPORT
> > +M:	Shruthi Sanil <shruthi.sanil@...el.com>
> > +S:	Maintained
> > +F:	drivers/clocksource/timer-keembay.c
> > +
> >  INTEL MANAGEMENT ENGINE (mei)
> >  M:	Tomas Winkler <tomas.winkler@...el.com>
> >  L:	linux-kernel@...r.kernel.org
> > diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> > index 39aa21d01e05..08f491cf7f61 100644
> > --- a/drivers/clocksource/Kconfig
> > +++ b/drivers/clocksource/Kconfig
> > @@ -693,4 +693,15 @@ config MICROCHIP_PIT64B
> >  	  modes and high resolution. It is used as a clocksource
> >  	  and a clockevent.
> >
> > +config KEEMBAY_TIMER
> > +	bool "Intel Keem Bay timer"
> > +	depends on ARCH_KEEMBAY
> > +	select TIMER_OF
> 
> Please refer to the other timer option to see how we create silent option. We
> want the Kconfig's platform to select the timer, not the user except for
> compilation coverage or expert mode.

OK, I'll check and update accordingly.

Thanks,
Shruthi

> 
> > +	help
> > +	  This option enables the support for the Intel Keem Bay
> > +	  general purpose timer and free running counter driver.
> > +	  Each timer can generate an individual interrupt and
> > +	  supports oneshot and periodic modes.
> > +	  The 64-bit counter can be used as a clock source.
> > +
> >  endmenu
> 
> Other than that, LGTM.
> 
> Thanks
>   -- Daniel
> 
> 
> --
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