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Message-ID: <CACRpkdY6c750Dnh2H_6uEhOHJv-kLd_OpHqnuDKu4DQezZ2C_w@mail.gmail.com>
Date: Fri, 4 Jun 2021 11:35:48 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Jonathan Neuschäfer <j.neuschaefer@....net>
Cc: "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>, Rob Herring <robh+dt@...nel.org>,
OpenBMC Maillist <openbmc@...ts.ozlabs.org>,
Tomer Maimon <tmaimon77@...il.com>,
Joel Stanley <joel@....id.au>,
linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 4/8] dt-bindings: pinctrl: Add Nuvoton WPCM450
Hi Jonathan!
thanks for your patch!
On Wed, Jun 2, 2021 at 2:04 PM Jonathan Neuschäfer
<j.neuschaefer@....net> wrote:
> + interrupts: true
maxitems 4 right?
Make an enum:
interrupts:
- description: what IRQ0 is for
- description: what IRQ1 is for
- description: what IRQ2 is for
- description: what IRQ3 is for
And describe how these interrupts are used. Because I am suspicious that they
actually correspond to 4 different GPIO blocks, which should then be their own
nodes.
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/gpio/gpio.h>
> + pinctrl: pinctrl@...03000 {
> + compatible = "nuvoton,wpcm450-pinctrl";
> + reg = <0xb8003000 0x1000>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupts = <2 IRQ_TYPE_LEVEL_HIGH
> + 3 IRQ_TYPE_LEVEL_HIGH
> + 4 IRQ_TYPE_LEVEL_HIGH
> + 5 IRQ_TYPE_LEVEL_HIGH>;
So these.
> + rmii2 {
> + groups = "rmii2";
> + function = "rmii2";
> + };
> +
> + pinctrl_uid: uid {
> + pins = "gpio14";
> + input-debounce = <1>;
> + };
I challenge you here and encourage you to put a node for each
GPIO "port":
port0: gpio@0 {
....
};
port1: gpio@1 {
....
};
> + gpio-keys {
> + compatible = "gpio-keys";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uid>;
> +
> + uid {
> + label = "UID";
> + linux,code = <102>;
> + gpios = <&pinctrl 14 GPIO_ACTIVE_HIGH>;
Would be gpios <&port0 14...>
Yours,
Linus Walleij
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