linux-kernel - Re: [PATCH] Documentation: dt-bindings: Fix incorrect statement

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Date:   Mon, 7 Jun 2021 10:13:23 +0800
From:   "wangyanan (Y)" <wangyanan55@...wei.com>
To:     Rob Herring <robh@...nel.org>
CC:     Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-riscv@...ts.infradead.org>, <wanghaibin.wang@...wei.com>
Subject: Re: [PATCH] Documentation: dt-bindings: Fix incorrect statement



On 2021/6/5 3:41, Rob Herring wrote:
> On Fri, May 21, 2021 at 05:57:20PM +0800, Yanan Wang wrote:
>> It's found when reading the Doc.
> Please improve the subject so we have some clue as to what the change is
> and what it applies to.
>   
Ok, I will improve the subject to make it more readable.
>> In a SMP system, the hierarchy of CPUs now can be defined through
>> four not three entities (socket/cluster/core/thread), so correct
>> the statement to avoid possible confusion.
>>
>> Since we are already there, also drop an extra space and tweak
>> the title alignment. No real context change at all.
> Since already here, converting to schema would be preferred over trivial
> fixes.
With pleasure to do this. I will send a v2 including this part of work.

Thanks,
Yanan
>> Cc: Rob Herring <robh+dt@...nel.org>
>> Cc: Paul Walmsley <paul.walmsley@...ive.com>
>> Cc: Palmer Dabbelt <palmer@...belt.com>
>> Cc: Albert Ou <aou@...s.berkeley.edu>
>> Signed-off-by: Yanan Wang <wangyanan55@...wei.com>
>> ---
>>   Documentation/devicetree/bindings/cpu/cpu-topology.txt | 8 ++++----
>>   1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/cpu/cpu-topology.txt b/Documentation/devicetree/bindings/cpu/cpu-topology.txt
>> index 9bd530a35d14..8b23a98c283c 100644
>> --- a/Documentation/devicetree/bindings/cpu/cpu-topology.txt
>> +++ b/Documentation/devicetree/bindings/cpu/cpu-topology.txt
>> @@ -6,7 +6,7 @@ CPU topology binding description
>>   1 - Introduction
>>   ===========================================
>>   
>> -In a SMP system, the hierarchy of CPUs is defined through three entities that
>> +In a SMP system, the hierarchy of CPUs is defined through four entities that
>>   are used to describe the layout of physical CPUs in the system:
>>   
>>   - socket
>> @@ -75,7 +75,7 @@ whose bindings are described in paragraph 3.
>>   
>>   The nodes describing the CPU topology (socket/cluster/core/thread) can
>>   only be defined within the cpu-map node and every core/thread in the
>> -system must be defined within the topology.  Any other configuration is
>> +system must be defined within the topology. Any other configuration is
>>   invalid and therefore must be ignored.
>>   
>>   ===========================================
>> @@ -91,9 +91,9 @@ cpu-map child nodes which do not share a common parent node can have the same
>>   name (ie same number N as other cpu-map child nodes at different device tree
>>   levels) since name uniqueness will be guaranteed by the device tree hierarchy.
>>   
>> -===========================================
>> +============================================
>>   3 - socket/cluster/core/thread node bindings
>> -===========================================
>> +============================================
>>   
>>   Bindings for socket/cluster/cpu/thread nodes are defined as follows:
>>   
>> -- 
>> 2.19.1
> .