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Message-Id: <20210607112856.3499682-1-punitagrawal@gmail.com>
Date: Mon, 7 Jun 2021 20:28:52 +0900
From: Punit Agrawal <punitagrawal@...il.com>
To: helgaas@...nel.org, robh+dt@...nel.org
Cc: Punit Agrawal <punitagrawal@...il.com>,
linux-rockchip@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org, alexandru.elisei@....com, wqu@...e.com,
robin.murphy@....com, pgwipeout@...il.com, ardb@...nel.org,
briannorris@...omium.org, shawn.lin@...k-chips.com
Subject: [PATCH v3 0/4] PCI: of: Improvements to handle 64-bit attribute for non-prefetchable ranges
Hi,
This is the third iteration to improve handling of the 64-bit
attribute on non-prefetchable host bridge ranges. Previous version can
be found at [0][1].
This version is a small update over the previous version - changelog
below. If there is no futher feedback on the patches, please consider
merging them.
Thanks,
Punit
Changes:
v3:
* Improved commit log for clarity (Patch 1)
* Added Tested-by tags
v2:
* Check ranges PCI / bus addresses rather than CPU addresses
* (new) Restrict 32-bit size warnings on ranges that don't have the 64-bit attribute set
* Refactor the 32-bit size warning to the range parsing loop. This
change also prints the warnings right after the window mappings are
logged.
[0] https://lore.kernel.org/linux-arm-kernel/20210527150541.3130505-1-punitagrawal@gmail.com/
[1] https://lore.kernel.org/linux-pci/20210531221057.3406958-1-punitagrawal@gmail.com/
Punit Agrawal (4):
PCI: of: Clear 64-bit flag for non-prefetchable memory below 4GB
PCI: of: Relax the condition for warning about non-prefetchable memory
aperture size
PCI: of: Refactor the check for non-prefetchable 32-bit window
arm64: dts: rockchip: Update PCI host bridge window to 32-bit address
memory
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
drivers/pci/of.c | 17 ++++++++++++-----
2 files changed, 13 insertions(+), 6 deletions(-)
--
2.30.2
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