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Message-Id: <20210608023305.25371-4-jon.lin@rock-chips.com>
Date: Tue, 8 Jun 2021 10:33:05 +0800
From: Jon Lin <jon.lin@...k-chips.com>
To: linux-spi@...r.kernel.org
Cc: jon.lin@...k-chips.com, broonie@...nel.org, robh+dt@...nel.org,
heiko@...ech.de, jbx6244@...il.com, hjc@...k-chips.com,
yifeng.zhao@...k-chips.com, sugar.zhang@...k-chips.com,
linux-rockchip@...ts.infradead.org, linux-mtd@...ts.infradead.org,
p.yadav@...com, macroalpha82@...il.com, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Chris Morgan <macromorgan@...mail.com>
Subject: [PATCH v6 8/8] arm64: dts: rockchip: Enable SFC for Odroid Go Advance
From: Chris Morgan <macromorgan@...mail.com>
This enables the Rockchip Serial Flash Controller for the Odroid Go
Advance. Note that while the attached SPI NOR flash and the controller
both support quad read mode, only 2 of the required 4 pins are present.
The rx and tx bus width is set to 2 for this reason.
Signed-off-by: Chris Morgan <macromorgan@...mail.com>
Signed-off-by: Jon Lin <jon.lin@...k-chips.com>
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
Changes in v1: None
.../boot/dts/rockchip/rk3326-odroid-go2.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
index 49c97f76df77..f78e11dd8447 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
@@ -484,6 +484,22 @@
status = "okay";
};
+&sfc {
+ pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus2>;
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <108000000>;
+ spi-rx-bus-width = <2>;
+ spi-tx-bus-width = <2>;
+ };
+};
+
&tsadc {
status = "okay";
};
--
2.17.1
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