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Message-ID: <DM5PR12MB18351813A8F94B0D18E6B505DA379@DM5PR12MB1835.namprd12.prod.outlook.com>
Date:   Tue, 8 Jun 2021 21:17:05 +0000
From:   Gustavo Pimentel <Gustavo.Pimentel@...opsys.com>
To:     Vidya Sagar <vidyas@...dia.com>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "amurray@...goodpenguin.co.uk" <amurray@...goodpenguin.co.uk>,
        "jingoohan1@...il.com" <jingoohan1@...il.com>,
        Joao Pinto <Joao.Pinto@...opsys.com>
CC:     Jonathan Hunter <jonathanh@...dia.com>,
        Thierry Reding <treding@...dia.com>,
        Krishna Thota <kthota@...dia.com>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: Query regarding the use of pcie-designware-plat.c file

Hi Vidya,

The pcie-designware-plat.c is the driver for the Synopsys PCIe RC IP 
prototype.

-Gustavo

On Tue, Jun 8, 2021 at 20:22:37, Vidya Sagar <vidyas@...dia.com> wrote:

> Hi,
> I would like to know what is the use of pcie-designware-plat.c file. 
> This looks like a skeleton file and can't really work with any specific 
> hardware as such.
> Some context for this mail thread is, if the config CONFIG_PCIE_DW_PLAT 
> is enabled in a system where a Synopsys DesignWare IP based PCIe 
> controller is present and its configuration is enabled (Ex:- Tegra194 
> system with CONFIG_PCIE_TEGRA194_HOST enabled), then, it can so happen 
> that the probe of pcie-designware-plat.c called first (because all DWC 
> based PCIe controller nodes have "snps,dw-pcie" compatibility string) 
> and can crash the system.
> One solution to this issue is to remove the "snps,dw-pcie" from the 
> compatibility string (as was done through the commit f9f711efd441 
> ("arm64: tegra: Fix Tegra194 PCIe compatible string") but it seems like 
> a localized fix for Tegra194 where the issue potentially is global, as 
> in, the crash can happen on any platform.
> So, wondering if the config option CONFIG_PCIE_DW_PLAT can be removed 
> altogether for pcie-designware-plat.c?
> 
> Thanks,
> Vidya Sagar


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