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Message-ID: <87lf7jqavd.wl-maz@kernel.org>
Date:   Wed, 09 Jun 2021 17:08:22 +0100
From:   Marc Zyngier <maz@...nel.org>
To:     Punit Agrawal <punitagrawal@...il.com>, helgaas@...nel.org,
        robh+dt@...nel.org
Cc:     linux-rockchip@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-pci@...r.kernel.org, alexandru.elisei@....com, wqu@...e.com,
        robin.murphy@....com, pgwipeout@...il.com, ardb@...nel.org,
        briannorris@...omium.org, shawn.lin@...k-chips.com
Subject: Re: [PATCH v3 0/4] PCI: of: Improvements to handle 64-bit attribute for non-prefetchable ranges

Hi Punit,

On Mon, 07 Jun 2021 12:28:52 +0100,
Punit Agrawal <punitagrawal@...il.com> wrote:
> 
> Hi,
> 
> This is the third iteration to improve handling of the 64-bit
> attribute on non-prefetchable host bridge ranges. Previous version can
> be found at [0][1].
> 
> This version is a small update over the previous version - changelog
> below. If there is no futher feedback on the patches, please consider
> merging them.

Thanks for this. This brings my test machine back to life:

Acked-by: Marc Zyngier <maz@...nel.org>
Tested-by: Marc Zyngier <maz@...nel.org>

Any chance this could hit upstream shortly? RK3399 is a fairly popular
SoC, and a number of us are running test boxes based on it.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

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