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Date: Wed, 9 Jun 2021 14:14:39 -0700
From: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
To: Thomas Gleixner <tglx@...utronix.de>,
Borislav Petkov <bp@...en8.de>
Cc: Jonathan Corbet <corbet@....net>,
Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...hat.com>,
Namhyung Kim <namhyung@...nel.org>, x86@...nel.org,
"H. Peter Anvin" <hpa@...or.com>,
"Paul E. McKenney" <paulmck@...nel.org>,
Randy Dunlap <rdunlap@...radead.org>,
Andrew Morton <akpm@...ux-foundation.org>,
"Maciej W. Rozycki" <macro@...am.me.uk>,
Viresh Kumar <viresh.kumar@...aro.org>,
Vlastimil Babka <vbabka@...e.cz>,
Tony Luck <tony.luck@...el.com>,
Paolo Bonzini <pbonzini@...hat.com>,
Sean Christopherson <seanjc@...gle.com>,
Kyung Min Park <kyung.min.park@...el.com>,
Fenghua Yu <fenghua.yu@...el.com>,
Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>,
Tom Lendacky <thomas.lendacky@....com>,
Juergen Gross <jgross@...e.com>,
Krish Sadhukhan <krish.sadhukhan@...cle.com>,
Kan Liang <kan.liang@...ux.intel.com>,
Joerg Roedel <jroedel@...e.de>,
Victor Ding <victording@...gle.com>,
Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>,
Brijesh Singh <brijesh.singh@....com>,
Dave Hansen <dave.hansen@...el.com>,
Mike Rapoport <rppt@...nel.org>,
Anthony Steinhauser <asteinhauser@...gle.com>,
Anand K Mistry <amistry@...gle.com>,
Andi Kleen <ak@...ux.intel.com>,
Miguel Ojeda <ojeda@...nel.org>,
Nick Desaulniers <ndesaulniers@...ogle.com>,
Joe Perches <joe@...ches.com>, linux-doc@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org
Subject: [PATCH 4/4] x86/tsx: Add cmdline tsx=fake to not clear CPUID bits
RTM and HLE
On CPUs that deprecated TSX, clearing the enumeration bits CPUID.RTM and
CPUID.HLE may not be desirable in some corner cases. Like a saved guest
would refuse to resume if it was saved before the microcode update
that deprecated TSX.
Add a cmdline option "tsx=fake" to not clear CPUID bits even when the
hardware always aborts TSX transactions.
Suggested-by: Tony Luck <tony.luck@...el.com>
Suggested-by: Andi Kleen <ak@...ux.intel.com>
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
Reviewed-by: Andi Kleen <ak@...ux.intel.com>
Reviewed-by: Tony Luck <tony.luck@...el.com>
Tested-by: Neelima Krishnan <neelima.krishnan@...el.com>
---
Documentation/admin-guide/kernel-parameters.txt | 3 +++
arch/x86/kernel/cpu/bugs.c | 5 +++--
arch/x86/kernel/cpu/cpu.h | 1 +
arch/x86/kernel/cpu/tsx.c | 7 +++++--
4 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index cb89dbdedc46..ced9e5596163 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -5693,6 +5693,9 @@
auto - Disable TSX if X86_BUG_TAA is present,
otherwise enable TSX on the system.
+ fake - Do not clear the CPUID bits RTM and HLE even
+ when hardware always aborts TSX transactions.
+
Not specifying this option is equivalent to tsx=off.
See Documentation/admin-guide/hw-vuln/tsx_async_abort.rst
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index d41b70fe4918..46fcc392a339 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -316,8 +316,9 @@ static void __init taa_select_mitigation(void)
return;
}
- /* TSX previously disabled by tsx=off */
- if (!boot_cpu_has(X86_FEATURE_RTM)) {
+ /* TSX previously disabled by tsx=off or by microcode */
+ if (!boot_cpu_has(X86_FEATURE_RTM) ||
+ boot_cpu_has(X86_FEATURE_RTM_ALWAYS_ABORT)) {
taa_mitigation = TAA_MITIGATION_TSX_DISABLED;
goto out;
}
diff --git a/arch/x86/kernel/cpu/cpu.h b/arch/x86/kernel/cpu/cpu.h
index 95521302630d..84a479866c4b 100644
--- a/arch/x86/kernel/cpu/cpu.h
+++ b/arch/x86/kernel/cpu/cpu.h
@@ -49,6 +49,7 @@ enum tsx_ctrl_states {
TSX_CTRL_ENABLE,
TSX_CTRL_DISABLE,
TSX_CTRL_RTM_ALWAYS_ABORT,
+ TSX_CTRL_FAKE,
TSX_CTRL_NOT_SUPPORTED,
};
diff --git a/arch/x86/kernel/cpu/tsx.c b/arch/x86/kernel/cpu/tsx.c
index 5ed99811504c..2f8e50584297 100644
--- a/arch/x86/kernel/cpu/tsx.c
+++ b/arch/x86/kernel/cpu/tsx.c
@@ -113,6 +113,8 @@ void __init tsx_init(void)
tsx_ctrl_state = TSX_CTRL_DISABLE;
} else if (!strcmp(arg, "auto")) {
tsx_ctrl_state = x86_get_tsx_auto_mode();
+ } else if (!strcmp(arg, "fake")) {
+ tsx_ctrl_state = TSX_CTRL_FAKE;
} else {
tsx_ctrl_state = TSX_CTRL_DISABLE;
pr_err("invalid option, defaulting to off\n");
@@ -131,9 +133,10 @@ void __init tsx_init(void)
* Hardware will always abort a TSX transaction if both CPUID bits
* RTM_ALWAYS_ABORT and TSX_FORCE_ABORT are enumerated. In this case it
* is better not to enumerate CPUID.RTM and CPUID.HLE bits. Clear them
- * here.
+ * here, except when user requested not to clear via cmdline tsx=fake.
*/
- if (boot_cpu_has(X86_FEATURE_RTM_ALWAYS_ABORT) &&
+ if (tsx_ctrl_state != TSX_CTRL_FAKE &&
+ boot_cpu_has(X86_FEATURE_RTM_ALWAYS_ABORT) &&
boot_cpu_has(X86_FEATURE_TSX_FORCE_ABORT)) {
tsx_ctrl_state = TSX_CTRL_RTM_ALWAYS_ABORT;
tsx_clear_cpuid();
--
git-series 0.9.1
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