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Message-Id: <20210609080112.1753221-6-miquel.raynal@bootlin.com>
Date: Wed, 9 Jun 2021 10:00:59 +0200
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
Tudor Ambarus <Tudor.Ambarus@...rochip.com>,
<linux-mtd@...ts.infradead.org>, Rob Herring <robh+dt@...nel.org>,
<devicetree@...r.kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
Cc: Michal Simek <monstr@...str.eu>,
Naga Sureshkumar Relli <nagasure@...inx.com>,
Amit Kumar Mahapatra <akumarma@...inx.com>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, helmut.grohne@...enta.de,
Srinivas Goud <sgoud@...inx.com>,
Siva Durga Prasad Paladugu <sivadur@...inx.com>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Rob Herring <robh@...nel.org>
Subject: [PATCH v22 05/18] dt-binding: memory: pl353-smc: Fix the example syntax and style
Enhance the spacing, the comment style, add { }, remove (...).
Signed-off-by: Miquel Raynal <miquel.raynal@...tlin.com>
Reviewed-by: Rob Herring <robh@...nel.org>
---
.../bindings/memory-controllers/pl353-smc.txt | 48 ++++++++++---------
1 file changed, 25 insertions(+), 23 deletions(-)
diff --git a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
index 105160c795a1..46e17f5bc45b 100644
--- a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
@@ -24,27 +24,29 @@ Required device node properties:
of the memory region requested by the device.
Example:
- smcc: memory-controller@...0e000
- compatible = "arm,pl353-smc-r2p1", "arm,primecell";
- clock-names = "memclk", "apb_pclk";
- clocks = <&clkc 11>, <&clkc 44>;
- reg = <0xe000e000 0x1000>;
- #address-cells = <2>;
- #size-cells = <1>;
- ranges = <0x0 0x0 0xe1000000 0x1000000 //Nand CS Region
- 0x1 0x0 0xe2000000 0x2000000 //SRAM/NOR CS Region
- 0x2 0x0 0xe4000000 0x2000000>; //SRAM/NOR CS Region
- nand_0: flash@...00000 {
- compatible = "arm,pl353-nand-r2p1"
- reg = <0 0 0x1000000>;
- (...)
- };
- nor0: flash@...00000 {
- compatible = "cfi-flash";
- reg = <1 0 0x2000000>;
- };
- nor1: flash@...00000 {
- compatible = "cfi-flash";
- reg = <2 0 0x2000000>;
- };
+ smcc: memory-controller@...0e000 {
+ compatible = "arm,pl353-smc-r2p1", "arm,primecell";
+ clock-names = "memclk", "apb_pclk";
+ clocks = <&clkc 11>, <&clkc 44>;
+ reg = <0xe000e000 0x1000>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */
+ 0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */
+ 0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */
+
+ nand_0: flash@...00000 {
+ compatible = "arm,pl353-nand-r2p1";
+ reg = <0 0 0x1000000>;
+ };
+
+ nor0: flash@...00000 {
+ compatible = "cfi-flash";
+ reg = <1 0 0x2000000>;
+ };
+
+ nor1: flash@...00000 {
+ compatible = "cfi-flash";
+ reg = <2 0 0x2000000>;
+ };
};
--
2.27.0
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