linux-kernel - RE: [RFC] Adding A64FX hardware prefetch sysfs interface

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Message-ID: <OSBPR01MB203795631B6A90121283C1B480369@OSBPR01MB2037.jpnprd01.prod.outlook.com>
Date:   Wed, 9 Jun 2021 09:40:41 +0000
From:   "tarumizu.kohei@...itsu.com" <tarumizu.kohei@...itsu.com>
To:     'Borislav Petkov' <bp@...en8.de>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>
CC:     "'hpa@...or.com'" <hpa@...or.com>,
        "'tglx@...utronix.de'" <tglx@...utronix.de>,
        "'mingo@...hat.com'" <mingo@...hat.com>,
        "'x86@...nel.org'" <x86@...nel.org>,
        "'linux-kernel@...r.kernel.org'" <linux-kernel@...r.kernel.org>
Subject: RE: [RFC] Adding A64FX hardware prefetch sysfs interface

Hi, Borislav and ARM folks.

> For that we already have a hierarchy:

Thank you for the information.
We would like to see how cpu<NUM>/cache is implemented on x86 first, since we are not familiar with the design of cpu<num>/cache.

> Right, that I'd design differently:
> 
> 	.../cache/prefetcher/l1/
> 		            /l1/enable
> 			    /l1/dist
> 		            /l1/reliable
> 	...		    /l2/
> 	...		    /l3/
> 
> so that you have a directory per cache level and in that directory you have each
> file.

We agree that it is better to place hardware prefetch files under the cpu<num>/cache directory.

> But let's loop in ARM folks as this is an ARM CPU after all and they'd care for
> that code.

To the ARM folks:
Would you give me information about the current state of cpu<num>/cache implementation in ARM and the future plans?
If it doesn't yet exist as a feature, we would like to contribute to the work to enable it.