linux-kernel - Re: [PATCH v2 2/2] mmc: JZ4740: Add support for JZ4775.

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Message-Id: <V5MHUQ.E8C6HNTG18GS3@crapouillou.net>
Date:   Thu, 10 Jun 2021 14:15:31 +0100
From:   Paul Cercueil <paul@...pouillou.net>
To:     周琰杰 <zhouyanjie@...yeetech.com>
Cc:     ulf.hansson@...aro.org, robh+dt@...nel.org,
        linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
        dongsheng.qiu@...enic.com, aric.pzqi@...enic.com,
        rick.tyliu@...enic.com, sihui.liu@...enic.com,
        jun.jiang@...enic.com, sernia.zhou@...mail.com,
        zhenwenjin@...il.com
Subject: Re: [PATCH v2 2/2] mmc: JZ4740: Add support for JZ4775.

Hi Zhou,

Le jeu., juin 10 2021 at 20:58:50 +0800, 周琰杰 (Zhou Yanjie) 
<zhouyanjie@...yeetech.com> a écrit :
> 1.Add support for probing mmc driver on the JZ4775 SoC from Ingenic.
> 2.The drive clock selection and sample clock selection have been
>   supported since JZ4775, not X1000. So support for these two
>   functions has been added for JZ4775 and JZ4780.
> 
> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@...yeetech.com>

Acked-by: Paul Cercueil <paul@...pouillou.net>

Now that's a good-looking patch ;)
Thanks for working on it.

Cheers,
-Paul

> ---
> 
> Notes:
>     v1->v2:
>     1.Remove unnecessary renaming as Paul Cercueil's suggestion.
>     2.Reuse the ID of JZ4775 and JZ4780 to simplify the code.
>     3.Add support of drive clock selection and sample clock
>       selection for JZ4775 and JZ4780.
> 
>  drivers/mmc/host/jz4740_mmc.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mmc/host/jz4740_mmc.c 
> b/drivers/mmc/host/jz4740_mmc.c
> index b3c636e..f3172e5 100644
> --- a/drivers/mmc/host/jz4740_mmc.c
> +++ b/drivers/mmc/host/jz4740_mmc.c
> @@ -674,7 +674,7 @@ static void jz4740_mmc_send_command(struct 
> jz4740_mmc_host *host,
>  			cmdat |= JZ_MMC_CMDAT_WRITE;
>  		if (host->use_dma) {
>  			/*
> -			 * The 4780's MMC controller has integrated DMA ability
> +			 * The JZ4780's MMC controller has integrated DMA ability
>  			 * in addition to being able to use the external DMA
>  			 * controller. It moves DMA control bits to a separate
>  			 * register. The DMA_SEL bit chooses the external
> @@ -866,7 +866,7 @@ static int jz4740_mmc_set_clock_rate(struct 
> jz4740_mmc_host *host, int rate)
>  	writew(div, host->base + JZ_REG_MMC_CLKRT);
> 
>  	if (real_rate > 25000000) {
> -		if (host->version >= JZ_MMC_X1000) {
> +		if (host->version >= JZ_MMC_JZ4780) {
>  			writel(JZ_MMC_LPM_DRV_RISING_QTR_PHASE_DLY |
>  				   JZ_MMC_LPM_SMP_RISING_QTR_OR_HALF_PHASE_DLY |
>  				   JZ_MMC_LPM_LOW_POWER_MODE_EN,
> @@ -959,6 +959,7 @@ static const struct of_device_id 
> jz4740_mmc_of_match[] = {
>  	{ .compatible = "ingenic,jz4740-mmc", .data = (void *) 
> JZ_MMC_JZ4740 },
>  	{ .compatible = "ingenic,jz4725b-mmc", .data = (void 
> *)JZ_MMC_JZ4725B },
>  	{ .compatible = "ingenic,jz4760-mmc", .data = (void *) 
> JZ_MMC_JZ4760 },
> +	{ .compatible = "ingenic,jz4775-mmc", .data = (void *) 
> JZ_MMC_JZ4780 },
>  	{ .compatible = "ingenic,jz4780-mmc", .data = (void *) 
> JZ_MMC_JZ4780 },
>  	{ .compatible = "ingenic,x1000-mmc", .data = (void *) JZ_MMC_X1000 
> },
>  	{},
> --
> 2.7.4
>