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Message-ID: <YMIoWS57Ra19E1qT@lunn.ch>
Date:   Thu, 10 Jun 2021 16:57:29 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Zhou Yanjie <zhouyanjie@...yeetech.com>
Cc:     davem@...emloft.net, kuba@...nel.org, robh+dt@...nel.org,
        peppe.cavallaro@...com, alexandre.torgue@...s.st.com,
        joabreu@...opsys.com, mcoquelin.stm32@...il.com,
        linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org,
        netdev@...r.kernel.org, devicetree@...r.kernel.org,
        linux-stm32@...md-mailman.stormreply.com,
        linux-arm-kernel@...ts.infradead.org, dongsheng.qiu@...enic.com,
        aric.pzqi@...enic.com, rick.tyliu@...enic.com,
        sihui.liu@...enic.com, jun.jiang@...enic.com,
        sernia.zhou@...mail.com, paul@...pouillou.net
Subject: Re: [PATCH v2 2/2] net: stmmac: Add Ingenic SoCs MAC support.

> Here is Ingenic's reply, the time length corresponding to a unit is 19.5ps
> (19500fs).

Sometimes, there is a negative offset in the delays. So a delay value
of 0 written to the register actually means -200ps or something.

   Andrew

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